Commit: 90092e730582d024f621c78c6b5b1e6f2348e77d - binutils_os216 (git)

GNU Binutils with patches for OS216

Commit MetaInfo

• Revision: 90092e730582d024f621c78c6b5b1e6f2348e77d (tree)
• Zeit: 2015-02-11 23:36:39
• Autor: Nick Clifton <nickc@redh...>
• Commiter: Nick Clifton

Log Message

Fixes a problem with the RL78 disassembler which would incorrectly disassemble [HL+0] as [HL].

* rl78-decode.opc: Add 'a' attribute to instructions that support
[HL+0] addressing.
* rl78-decode.c: Regenerate.
* rl78-dis.c (print_insn_rl78): Display the offset in [HL+0]
addresses.

Ändern Zusammenfassung

• modified: opcodes/rl78-decode.c
• modified: opcodes/rl78-decode.opc
• modified: opcodes/rl78-dis.c

Diff

--- a/opcodes/rl78-decode.c
+++ b/opcodes/rl78-decode.c
@@ -369,14 +369,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x0e:
         {
-          /** 0000 1110			add	%0, %e1				*/
+          /** 0000 1110			add	%0, %ea1			*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 0000 1110			add	%0, %e1				*/",
+                     "/** 0000 1110			add	%0, %ea1			*/",
                      op[0]);
             }
-          SYNTAX("add	%0, %e1");
+          SYNTAX("add	%0, %ea1");
 #line 209 "rl78-decode.opc"
           ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
           
@@ -568,14 +568,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x1e:
         {
-          /** 0001 1110			addc	%0, %e1				*/
+          /** 0001 1110			addc	%0, %ea1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 0001 1110			addc	%0, %e1				*/",
+                     "/** 0001 1110			addc	%0, %ea1				*/",
                      op[0]);
             }
-          SYNTAX("addc	%0, %e1");
+          SYNTAX("addc	%0, %ea1");
 #line 244 "rl78-decode.opc"
           ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
         
@@ -773,14 +773,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x2e:
         {
-          /** 0010 1110			sub	%0, %e1				*/
+          /** 0010 1110			sub	%0, %ea1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 0010 1110			sub	%0, %e1				*/",
+                     "/** 0010 1110			sub	%0, %ea1				*/",
                      op[0]);
             }
-          SYNTAX("sub	%0, %e1");
+          SYNTAX("sub	%0, %ea1");
 #line 1127 "rl78-decode.opc"
           ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
         
@@ -1339,14 +1339,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x3e:
         {
-          /** 0011 1110			subc	%0, %e1				*/
+          /** 0011 1110			subc	%0, %ea1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 0011 1110			subc	%0, %e1				*/",
+                     "/** 0011 1110			subc	%0, %ea1				*/",
                      op[0]);
             }
-          SYNTAX("subc	%0, %e1");
+          SYNTAX("subc	%0, %ea1");
 #line 1162 "rl78-decode.opc"
           ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
         
@@ -1558,14 +1558,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x4e:
         {
-          /** 0100 1110			cmp	%0, %e1				*/
+          /** 0100 1110			cmp	%0, %ea1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 0100 1110			cmp	%0, %e1				*/",
+                     "/** 0100 1110			cmp	%0, %ea1				*/",
                      op[0]);
             }
-          SYNTAX("cmp	%0, %e1");
+          SYNTAX("cmp	%0, %ea1");
 #line 497 "rl78-decode.opc"
           ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
         
@@ -1705,14 +1705,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x5e:
         {
-          /** 0101 1110			and	%0, %e1			*/
+          /** 0101 1110			and	%0, %ea1			*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 0101 1110			and	%0, %e1			*/",
+                     "/** 0101 1110			and	%0, %ea1			*/",
                      op[0]);
             }
-          SYNTAX("and	%0, %e1");
+          SYNTAX("and	%0, %ea1");
 #line 293 "rl78-decode.opc"
           ID(and); DR(A); SM(HL, IMMU(1)); Fz;
         
@@ -1812,14 +1812,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0x09:
               {
-                /** 0110 0001 0000 1001		addw	%0, %e1			*/
+                /** 0110 0001 0000 1001		addw	%0, %ea1			*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 0000 1001		addw	%0, %e1			*/",
+                           "/** 0110 0001 0000 1001		addw	%0, %ea1			*/",
                            op[0], op[1]);
                   }
-                SYNTAX("addw	%0, %e1");
+                SYNTAX("addw	%0, %ea1");
 #line 267 "rl78-decode.opc"
                 ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
               
@@ -1925,14 +1925,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0x29:
               {
-                /** 0110 0001 0010 1001		subw	%0, %e1				*/
+                /** 0110 0001 0010 1001		subw	%0, %ea1				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 0010 1001		subw	%0, %e1				*/",
+                           "/** 0110 0001 0010 1001		subw	%0, %ea1				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("subw	%0, %e1");
+                SYNTAX("subw	%0, %ea1");
 #line 1185 "rl78-decode.opc"
                 ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
               
@@ -2038,14 +2038,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0x49:
               {
-                /** 0110 0001 0100 1001		cmpw	%0, %e1				*/
+                /** 0110 0001 0100 1001		cmpw	%0, %ea1				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 0100 1001		cmpw	%0, %e1				*/",
+                           "/** 0110 0001 0100 1001		cmpw	%0, %ea1				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("cmpw	%0, %e1");
+                SYNTAX("cmpw	%0, %ea1");
 #line 533 "rl78-decode.opc"
                 ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
               
@@ -2102,14 +2102,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0x59:
               {
-                /** 0110 0001 0101 1001		inc	%e0				*/
+                /** 0110 0001 0101 1001		inc	%ea0				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 0101 1001		inc	%e0				*/",
+                           "/** 0110 0001 0101 1001		inc	%ea0				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("inc	%e0");
+                SYNTAX("inc	%ea0");
 #line 583 "rl78-decode.opc"
                 ID(add); DM(HL, IMMU(1)); SC(1); Fza;
               
@@ -2166,14 +2166,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0x69:
               {
-                /** 0110 0001 0110 1001		dec	%e0				*/
+                /** 0110 0001 0110 1001		dec	%ea0				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 0110 1001		dec	%e0				*/",
+                           "/** 0110 0001 0110 1001		dec	%ea0				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("dec	%e0");
+                SYNTAX("dec	%ea0");
 #line 550 "rl78-decode.opc"
                 ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
               
@@ -2230,14 +2230,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0x79:
               {
-                /** 0110 0001 0111 1001		incw	%e0				*/
+                /** 0110 0001 0111 1001		incw	%ea0				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 0111 1001		incw	%e0				*/",
+                           "/** 0110 0001 0111 1001		incw	%ea0				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("incw	%e0");
+                SYNTAX("incw	%ea0");
 #line 597 "rl78-decode.opc"
                 ID(add); W(); DM(HL, IMMU(1)); SC(1);
               
@@ -2355,14 +2355,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0x89:
               {
-                /** 0110 0001 1000 1001		decw	%e0				*/
+                /** 0110 0001 1000 1001		decw	%ea0				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 1000 1001		decw	%e0				*/",
+                           "/** 0110 0001 1000 1001		decw	%ea0				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("decw	%e0");
+                SYNTAX("decw	%ea0");
 #line 564 "rl78-decode.opc"
                 ID(sub); W(); DM(HL, IMMU(1)); SC(1);
               
@@ -2506,14 +2506,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0xad:
               {
-                /** 0110 0001 1010 1101		xch	%0, %e1				*/
+                /** 0110 0001 1010 1101		xch	%0, %ea1				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 1010 1101		xch	%0, %e1				*/",
+                           "/** 0110 0001 1010 1101		xch	%0, %ea1				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("xch	%0, %e1");
+                SYNTAX("xch	%0, %ea1");
 #line 1217 "rl78-decode.opc"
                 ID(xch); DR(A); SM(HL, IMMU(1));
               
@@ -2758,14 +2758,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0xce:
               {
-                /** 0110 0001 1100 1110		movs	%e0, %1				*/
+                /** 0110 0001 1100 1110		movs	%ea0, %1				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 1100 1110		movs	%e0, %1				*/",
+                           "/** 0110 0001 1100 1110		movs	%ea0, %1				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("movs	%e0, %1");
+                SYNTAX("movs	%ea0, %1");
 #line 810 "rl78-decode.opc"
                 ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
               
@@ -2920,14 +2920,14 @@ rl78_decode_opcode (unsigned long pc AU,
             break;
           case 0xde:
               {
-                /** 0110 0001 1101 1110		cmps	%0, %e1				*/
+                /** 0110 0001 1101 1110		cmps	%0, %ea1				*/
                 if (trace)
                   {
                     printf ("\033[33m%s\033[0m  %02x %02x\n",
-                           "/** 0110 0001 1101 1110		cmps	%0, %e1				*/",
+                           "/** 0110 0001 1101 1110		cmps	%0, %ea1				*/",
                            op[0], op[1]);
                   }
-                SYNTAX("cmps	%0, %e1");
+                SYNTAX("cmps	%0, %ea1");
 #line 525 "rl78-decode.opc"
                 ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
               
@@ -3304,14 +3304,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x6e:
         {
-          /** 0110 1110			or	%0, %e1				*/
+          /** 0110 1110			or	%0, %ea1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 0110 1110			or	%0, %e1				*/",
+                     "/** 0110 1110			or	%0, %ea1				*/",
                      op[0]);
             }
-          SYNTAX("or	%0, %e1");
+          SYNTAX("or	%0, %ea1");
 #line 948 "rl78-decode.opc"
           ID(or); DR(A); SM(HL, IMMU(1)); Fz;
         
@@ -4275,14 +4275,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x7e:
         {
-          /** 0111 1110			xor	%0, %e1				*/
+          /** 0111 1110			xor	%0, %ea1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 0111 1110			xor	%0, %e1				*/",
+                     "/** 0111 1110			xor	%0, %ea1				*/",
                      op[0]);
             }
-          SYNTAX("xor	%0, %e1");
+          SYNTAX("xor	%0, %ea1");
 #line 1252 "rl78-decode.opc"
           ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
         
@@ -4390,14 +4390,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x8c:
         {
-          /** 1000 1100			mov	%0, %e1				*/
+          /** 1000 1100			mov	%0, %ea1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1000 1100			mov	%0, %e1				*/",
+                     "/** 1000 1100			mov	%0, %ea1				*/",
                      op[0]);
             }
-          SYNTAX("mov	%0, %e1");
+          SYNTAX("mov	%0, %ea1");
 #line 656 "rl78-decode.opc"
           ID(mov); DR(A); SM(HL, IMMU(1));
         
@@ -4535,14 +4535,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0x9c:
         {
-          /** 1001 1100			mov	%e0, %1				*/
+          /** 1001 1100			mov	%ea0, %1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1001 1100			mov	%e0, %1				*/",
+                     "/** 1001 1100			mov	%ea0, %1				*/",
                      op[0]);
             }
-          SYNTAX("mov	%e0, %1");
+          SYNTAX("mov	%ea0, %1");
 #line 632 "rl78-decode.opc"
           ID(mov); DM(HL, IMMU(1)); SR(A);
         
@@ -4742,14 +4742,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0xac:
         {
-          /** 1010 1100			movw	%0, %e1				*/
+          /** 1010 1100			movw	%0, %ea1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1010 1100			movw	%0, %e1				*/",
+                     "/** 1010 1100			movw	%0, %ea1				*/",
                      op[0]);
             }
-          SYNTAX("movw	%0, %e1");
+          SYNTAX("movw	%0, %ea1");
 #line 846 "rl78-decode.opc"
           ID(mov); W(); DR(AX); SM(HL, IMMU(1));
         
@@ -4948,14 +4948,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0xbc:
         {
-          /** 1011 1100			movw	%e0, %1				*/
+          /** 1011 1100			movw	%ea0, %1				*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1011 1100			movw	%e0, %1				*/",
+                     "/** 1011 1100			movw	%ea0, %1				*/",
                      op[0]);
             }
-          SYNTAX("movw	%e0, %1");
+          SYNTAX("movw	%ea0, %1");
 #line 827 "rl78-decode.opc"
           ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
         
@@ -5112,14 +5112,14 @@ rl78_decode_opcode (unsigned long pc AU,
       break;
     case 0xcc:
         {
-          /** 1100 1100			mov	%e0, #%1			*/
+          /** 1100 1100			mov	%ea0, #%1			*/
           if (trace)
             {
               printf ("\033[33m%s\033[0m  %02x\n",
-                     "/** 1100 1100			mov	%e0, #%1			*/",
+                     "/** 1100 1100			mov	%ea0, #%1			*/",
                      op[0]);
             }
-          SYNTAX("mov	%e0, #%1");
+          SYNTAX("mov	%ea0, #%1");
 #line 629 "rl78-decode.opc"
           ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
         

--- a/opcodes/rl78-decode.opc
+++ b/opcodes/rl78-decode.opc
@@ -205,7 +205,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1000 000		add	%0, %e1				*/
   ID(add); DR(A); SM2(HL, B, 0); Fzac;
 
-/** 0000 1110			add	%0, %e1				*/
+/** 0000 1110			add	%0, %ea1			*/
   ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
   
 /** 0110 0001 1000 0010		add	%0, %e1				*/
@@ -240,7 +240,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1001 0010		addc	%0, %e1				*/
   ID(addc); DR(A); SM2(HL, C, 0); Fzac;
 
-/** 0001 1110			addc	%0, %e1				*/
+/** 0001 1110			addc	%0, %ea1			*/
   ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
 
 /** 0001 1100			addc	%0, #%1				*/
@@ -263,7 +263,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0000 0010			addw	%0, %e!1			*/
   ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
 
-/** 0110 0001 0000 1001		addw	%0, %e1			*/
+/** 0110 0001 0000 1001		addw	%0, %ea1			*/
   ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
 
 /** 0000 0100			addw	%0, #%1				*/
@@ -289,7 +289,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1101 0000		and	%0, %e1			*/
   ID(and); DR(A); SM2(HL, B, 0); Fz;
 
-/** 0101 1110			and	%0, %e1			*/
+/** 0101 1110			and	%0, %ea1			*/
   ID(and); DR(A); SM(HL, IMMU(1)); Fz;
 
 /** 0110 0001 1101 0010		and	%0, %e1			*/
@@ -493,7 +493,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1100 0010		cmp	%0, %e1				*/
   ID(cmp); DR(A); SM2(HL, C, 0); Fzac;
 
-/** 0100 1110			cmp	%0, %e1				*/
+/** 0100 1110			cmp	%0, %ea1			*/
   ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
 
 /** 0100 1100			cmp	%0, #%1				*/
@@ -521,7 +521,7 @@ rl78_decode_opcode (unsigned long pc AU,
 
 /*----------------------------------------------------------------------*/
 
-/** 0110 0001 1101 1110		cmps	%0, %e1				*/
+/** 0110 0001 1101 1110		cmps	%0, %ea1			*/
   ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
 
 /*----------------------------------------------------------------------*/
@@ -529,7 +529,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0100 0010			cmpw	%0, %e!1			*/
   ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac;
 
-/** 0110 0001 0100 1001		cmpw	%0, %e1				*/
+/** 0110 0001 0100 1001		cmpw	%0, %ea1			*/
   ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
 
 /** 0100 0100			cmpw	%0, #%1				*/
@@ -546,7 +546,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1011 0000			dec	%e!0				*/
   ID(sub); DM(None, IMMU(2)); SC(1); Fza;
 
-/** 0110 0001 0110 1001		dec	%e0				*/
+/** 0110 0001 0110 1001		dec	%ea0				*/
   ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
 
 /** 1001 0reg			dec	%0				*/
@@ -560,7 +560,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1011 0010			decw	%e!0				*/
   ID(sub); W(); DM(None, IMMU(2)); SC(1);
 
-/** 0110 0001 1000 1001		decw	%e0				*/
+/** 0110 0001 1000 1001		decw	%ea0				*/
   ID(sub); W(); DM(HL, IMMU(1)); SC(1);
 
 /** 1011 0rg1 			decw	%0				*/
@@ -579,7 +579,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1010 0000			inc	%e!0				*/
   ID(add); DM(None, IMMU(2)); SC(1); Fza;
 
-/** 0110 0001 0101 1001		inc	%e0				*/
+/** 0110 0001 0101 1001		inc	%ea0				*/
   ID(add); DM(HL, IMMU(1)); SC(1); Fza;
 
 /** 1000 0reg			inc	%0				*/
@@ -593,7 +593,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1010 0010			incw	%e!0				*/
   ID(add); W(); DM(None, IMMU(2)); SC(1);
 
-/** 0110 0001 0111 1001		incw	%e0				*/
+/** 0110 0001 0111 1001		incw	%ea0				*/
   ID(add); W(); DM(HL, IMMU(1)); SC(1);
 
 /** 1010 0rg1			incw	%0				*/
@@ -625,10 +625,10 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1101 1001		mov	%e0, %1				*/
   ID(mov); DM2(HL, B, 0); SR(A);
 
-/** 1100 1100			mov	%e0, #%1			*/
+/** 1100 1100			mov	%ea0, #%1			*/
   ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
 
-/** 1001 1100			mov	%e0, %1				*/
+/** 1001 1100			mov	%ea0, %1			*/
   ID(mov); DM(HL, IMMU(1)); SR(A);
 
 /** 0110 0001 1111 1001		mov	%e0, %1				*/
@@ -652,7 +652,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1000 1011			mov	%0, %e1				*/
   ID(mov); DR(A); SM(HL, 0);
 
-/** 1000 1100			mov	%0, %e1				*/
+/** 1000 1100			mov	%0, %ea1			*/
   ID(mov); DR(A); SM(HL, IMMU(1));
 
 /** 0110 0001 1100 1001		mov	%0, %e1				*/
@@ -806,7 +806,7 @@ rl78_decode_opcode (unsigned long pc AU,
 
 /*----------------------------------------------------------------------*/
 
-/** 0110 0001 1100 1110		movs	%e0, %1				*/
+/** 0110 0001 1100 1110		movs	%ea0, %1			*/
   ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
 
 /*----------------------------------------------------------------------*/
@@ -823,7 +823,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1011 1011			movw	%e0, %1				*/
   ID(mov); W(); DM(HL, 0); SR(AX);
 
-/** 1011 1100			movw	%e0, %1				*/
+/** 1011 1100			movw	%ea0, %1			*/
   ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
 
 /** 1011 1000			movw	%0, %1				*/
@@ -842,7 +842,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1010 1011			movw	%0, %e1				*/
   ID(mov); W(); DR(AX); SM(HL, 0);
 
-/** 1010 1100			movw	%0, %e1				*/
+/** 1010 1100			movw	%0, %ea1			*/
   ID(mov); W(); DR(AX); SM(HL, IMMU(1));
 
 /** 1010 1000			movw	%0, %1				*/
@@ -944,7 +944,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1110 0000		or	%0, %e1				*/
   ID(or); DR(A); SM2(HL, B, 0); Fz;
 
-/** 0110 1110			or	%0, %e1				*/
+/** 0110 1110			or	%0, %ea1			*/
   ID(or); DR(A); SM(HL, IMMU(1)); Fz;
 
 /** 0110 0001 1110 0010		or	%0, %e1				*/
@@ -1123,7 +1123,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1010 000		sub	%0, %e1				*/
   ID(sub); DR(A); SM2(HL, B, 0); Fzac;
 
-/** 0010 1110			sub	%0, %e1				*/
+/** 0010 1110			sub	%0, %ea1			*/
   ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
 
 /** 0110 0001 1010 0010		sub	%0, %e1				*/
@@ -1158,7 +1158,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1011 0010		subc	%0, %e1				*/
   ID(subc); DR(A); SM2(HL, C, 0); Fzac;
 
-/** 0011 1110			subc	%0, %e1				*/
+/** 0011 1110			subc	%0, %ea1			*/
   ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
 
 /** 0011 1100			subc	%0, #%1				*/
@@ -1181,7 +1181,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0010 0010			subw	%0, %e!1			*/
   ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
 
-/** 0110 0001 0010 1001		subw	%0, %e1				*/
+/** 0110 0001 0010 1001		subw	%0, %ea1			*/
   ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
 
 /** 0010 0100			subw	%0, #%1				*/
@@ -1213,7 +1213,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1011 1001		xch	%0, %e1				*/
   ID(xch); DR(A); SM2(HL, B, 0);
 
-/** 0110 0001 1010 1101		xch	%0, %e1				*/
+/** 0110 0001 1010 1101		xch	%0, %ea1			*/
   ID(xch); DR(A); SM(HL, IMMU(1));
 
 /** 0110 0001 1010 1001		xch	%0, %e1				*/
@@ -1248,7 +1248,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 0110 0001 1111 0000		xor	%0, %e1				*/
   ID(xor); DR(A); SM2(HL, B, 0); Fz;
 
-/** 0111 1110			xor	%0, %e1				*/
+/** 0111 1110			xor	%0, %ea1			*/
   ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
 
 /** 0110 0001 1111 0010		xor	%0, %e1				*/

--- a/opcodes/rl78-dis.c
+++ b/opcodes/rl78-dis.c
@@ -284,7 +284,7 @@ print_insn_rl78 (bfd_vma addr, disassemble_info * dis)
 		    PR (PS, "[%s", register_names[oper->reg]);
 		    if (oper->reg2 != RL78_Reg_None)
 		      PR (PS, "+%s", register_names[oper->reg2]);
-		    if (oper->addend)
+		    if (oper->addend || do_addr)
 		      PR (PS, "+%d", oper->addend);
 		    PC (']');
 		    break;