GNU Binutils with patches for OS216
Revision | 331f1cbe1ca41ca35f74a97739688f496241e0cd (tree) |
---|---|
Zeit | 2006-03-17 04:09:48 |
Autor | Bernd Schmidt <bernds@code...> |
Commiter | Bernd Schmidt |
* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
logic to identify halfword shifts.
@@ -1,3 +1,8 @@ | ||
1 | +2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com> | |
2 | + | |
3 | + * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the | |
4 | + logic to identify halfword shifts. | |
5 | + | |
1 | 6 | 2006-03-16 Paul Brook <paul@codesourcery.com> |
2 | 7 | |
3 | 8 | * arm-dis.c (arm_opcodes): Rename swi to svc. |
@@ -4034,130 +4034,48 @@ decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf) | ||
4034 | 4034 | int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask); |
4035 | 4035 | |
4036 | 4036 | |
4037 | - if (HLs == 0 && sop == 0 && sopcde == 0) | |
4038 | - { | |
4039 | - OUTS (outf, dregs_lo (dst0)); | |
4040 | - OUTS (outf, "="); | |
4041 | - OUTS (outf, dregs_lo (src1)); | |
4042 | - OUTS (outf, ">>>"); | |
4043 | - OUTS (outf, uimm4 (newimmag)); | |
4044 | - } | |
4045 | - else if (HLs == 1 && sop == 0 && sopcde == 0) | |
4037 | + if (sop == 0 && sopcde == 0) | |
4046 | 4038 | { |
4047 | - OUTS (outf, dregs_lo (dst0)); | |
4048 | - OUTS (outf, "="); | |
4049 | - OUTS (outf, dregs_hi (src1)); | |
4050 | - OUTS (outf, ">>>"); | |
4051 | - OUTS (outf, uimm4 (newimmag)); | |
4052 | - } | |
4053 | - else if (HLs == 2 && sop == 0 && sopcde == 0) | |
4054 | - { | |
4055 | - OUTS (outf, dregs_hi (dst0)); | |
4056 | - OUTS (outf, "="); | |
4057 | - OUTS (outf, dregs_lo (src1)); | |
4058 | - OUTS (outf, ">>>"); | |
4059 | - OUTS (outf, uimm4 (newimmag)); | |
4060 | - } | |
4061 | - else if (HLs == 3 && sop == 0 && sopcde == 0) | |
4062 | - { | |
4063 | - OUTS (outf, dregs_hi (dst0)); | |
4064 | - OUTS (outf, "="); | |
4065 | - OUTS (outf, dregs_hi (src1)); | |
4066 | - OUTS (outf, ">>>"); | |
4039 | + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); | |
4040 | + OUTS (outf, " = "); | |
4041 | + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4042 | + OUTS (outf, " >>> "); | |
4067 | 4043 | OUTS (outf, uimm4 (newimmag)); |
4068 | 4044 | } |
4069 | - else if (HLs == 0 && sop == 1 && sopcde == 0) | |
4070 | - { | |
4071 | - OUTS (outf, dregs_lo (dst0)); | |
4072 | - OUTS (outf, "="); | |
4073 | - OUTS (outf, dregs_lo (src1)); | |
4074 | - OUTS (outf, "<<"); | |
4075 | - OUTS (outf, uimm4 (immag)); | |
4076 | - OUTS (outf, "(S)"); | |
4077 | - } | |
4078 | - else if (HLs == 1 && sop == 1 && sopcde == 0) | |
4079 | - { | |
4080 | - OUTS (outf, dregs_lo (dst0)); | |
4081 | - OUTS (outf, "="); | |
4082 | - OUTS (outf, dregs_hi (src1)); | |
4083 | - OUTS (outf, "<<"); | |
4084 | - OUTS (outf, uimm4 (immag)); | |
4085 | - OUTS (outf, "(S)"); | |
4086 | - } | |
4087 | - else if (HLs == 2 && sop == 1 && sopcde == 0) | |
4088 | - { | |
4089 | - OUTS (outf, dregs_hi (dst0)); | |
4090 | - OUTS (outf, "="); | |
4091 | - OUTS (outf, dregs_lo (src1)); | |
4092 | - OUTS (outf, "<<"); | |
4093 | - OUTS (outf, uimm4 (immag)); | |
4094 | - OUTS (outf, "(S)"); | |
4095 | - } | |
4096 | - else if (HLs == 3 && sop == 1 && sopcde == 0) | |
4097 | - { | |
4098 | - OUTS (outf, dregs_hi (dst0)); | |
4099 | - OUTS (outf, "="); | |
4100 | - OUTS (outf, dregs_hi (src1)); | |
4101 | - OUTS (outf, "<<"); | |
4102 | - OUTS (outf, uimm4 (immag)); | |
4103 | - OUTS (outf, "(S)"); | |
4104 | - } | |
4105 | - else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 0) | |
4045 | + else if (sop == 1 && sopcde == 0 && bit8 == 0) | |
4106 | 4046 | { |
4107 | - OUTS (outf, dregs_lo (dst0)); | |
4108 | - OUTS (outf, "="); | |
4109 | - OUTS (outf, dregs_lo (src1)); | |
4110 | - OUTS (outf, "<<"); | |
4047 | + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); | |
4048 | + OUTS (outf, " = "); | |
4049 | + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4050 | + OUTS (outf, " << "); | |
4111 | 4051 | OUTS (outf, uimm4 (immag)); |
4052 | + OUTS (outf, " (S)"); | |
4112 | 4053 | } |
4113 | - else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 1) | |
4114 | - { | |
4115 | - OUTS (outf, dregs_lo (dst0)); | |
4116 | - OUTS (outf, "="); | |
4117 | - OUTS (outf, dregs_lo (src1)); | |
4118 | - OUTS (outf, ">>"); | |
4119 | - OUTS (outf, uimm4 (newimmag)); | |
4120 | - } | |
4121 | - else if (HLs == 1 && sop == 2 && sopcde == 0) | |
4122 | - { | |
4123 | - OUTS (outf, dregs_lo (dst0)); | |
4124 | - OUTS (outf, "="); | |
4125 | - OUTS (outf, dregs_hi (src1)); | |
4126 | - OUTS (outf, ">>"); | |
4127 | - OUTS (outf, uimm4 (newimmag)); | |
4128 | - } | |
4129 | - else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 1) | |
4054 | + else if (sop == 1 && sopcde == 0 && bit8 == 1) | |
4130 | 4055 | { |
4131 | - OUTS (outf, dregs_hi (dst0)); | |
4132 | - OUTS (outf, "="); | |
4133 | - OUTS (outf, dregs_lo (src1)); | |
4134 | - OUTS (outf, ">>"); | |
4056 | + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); | |
4057 | + OUTS (outf, " = "); | |
4058 | + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4059 | + OUTS (outf, " >>> "); | |
4135 | 4060 | OUTS (outf, uimm4 (newimmag)); |
4061 | + OUTS (outf, " (S)"); | |
4136 | 4062 | } |
4137 | - else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 0) | |
4063 | + else if (sop == 2 && sopcde == 0 && bit8 == 0) | |
4138 | 4064 | { |
4139 | - OUTS (outf, dregs_hi (dst0)); | |
4140 | - OUTS (outf, "="); | |
4141 | - OUTS (outf, dregs_lo (src1)); | |
4142 | - OUTS (outf, "<<"); | |
4065 | + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); | |
4066 | + OUTS (outf, " = "); | |
4067 | + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4068 | + OUTS (outf, " << "); | |
4143 | 4069 | OUTS (outf, uimm4 (immag)); |
4144 | 4070 | } |
4145 | - else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 1) | |
4071 | + else if (sop == 2 && sopcde == 0 && bit8 == 1) | |
4146 | 4072 | { |
4147 | - OUTS (outf, dregs_hi (dst0)); | |
4148 | - OUTS (outf, "="); | |
4149 | - OUTS (outf, dregs_hi (src1)); | |
4150 | - OUTS (outf, ">>"); | |
4073 | + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); | |
4074 | + OUTS (outf, " = "); | |
4075 | + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4076 | + OUTS (outf, " >> "); | |
4151 | 4077 | OUTS (outf, uimm4 (newimmag)); |
4152 | 4078 | } |
4153 | - else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 0) | |
4154 | - { | |
4155 | - OUTS (outf, dregs_hi (dst0)); | |
4156 | - OUTS (outf, "="); | |
4157 | - OUTS (outf, dregs_hi (src1)); | |
4158 | - OUTS (outf, "<<"); | |
4159 | - OUTS (outf, uimm4 (immag)); | |
4160 | - } | |
4161 | 4079 | else if (sop == 2 && sopcde == 3 && HLs == 1) |
4162 | 4080 | { |
4163 | 4081 | OUTS (outf, "A1= ROT A1 BY "); |