GNU Binutils with patches for OS216
Revision | 30fab421840b35cdebabc01c5b90a2c1aaaa3912 (tree) |
---|---|
Zeit | 2016-03-19 02:30:12 |
Autor | Nick Clifton <nickc@redh...> |
Commiter | Nick Clifton |
Update description of AArch64 assembler directives.
gas * doc/c-aarch64.texi (AArch64 Directives): Add descriptions of
.cpu, .dword, .even, .inst. .tlsdescadd, .tlsdesccall,
.tlsdescldr and .xword directives.
@@ -1,5 +1,9 @@ | ||
1 | 1 | 2016-03-18 Nick Clifton <nickc@redhat.com> |
2 | 2 | |
3 | + * doc/c-aarch64.texi (AArch64 Directives): Add descriptions of | |
4 | + .cpu, .dword, .even, .inst. .tlsdescadd, .tlsdesccall, | |
5 | + .tlsdescldr and .xword directives. | |
6 | + | |
3 | 7 | PR target/19721 |
4 | 8 | * testsuite/gas/aarch64/pr19721.s: New test source file. |
5 | 9 | * testsuite/gas/aarch64/pr19721.d: New test driver file. |
@@ -273,12 +273,35 @@ incrementally to the architecture being compiled for. | ||
273 | 273 | This directive switches to the @code{.bss} section. |
274 | 274 | |
275 | 275 | @c CCCCCCCCCCCCCCCCCCCCCCCCCC |
276 | + | |
277 | +@cindex @code{.cpu} directive, AArch64 | |
278 | +@item .cpu @var{name} | |
279 | +Set the target processor. Valid values for @var{name} are the same as | |
280 | +those accepted by the @option{-mcpu=} command line option. | |
281 | + | |
276 | 282 | @c DDDDDDDDDDDDDDDDDDDDDDDDDD |
283 | + | |
284 | +@cindex @code{.dword} directive, AArch64 | |
285 | +@item .dword @var{expressions} | |
286 | +The @code{.dword} directive produces 64 bit values. | |
287 | + | |
277 | 288 | @c EEEEEEEEEEEEEEEEEEEEEEEEEE |
289 | + | |
290 | +@cindex @code{.even} directive, AArch64 | |
291 | +@item .even | |
292 | +The @code{.even} directive aligns the output on the next even byte | |
293 | +boundary. | |
294 | + | |
278 | 295 | @c FFFFFFFFFFFFFFFFFFFFFFFFFF |
279 | 296 | @c GGGGGGGGGGGGGGGGGGGGGGGGGG |
280 | 297 | @c HHHHHHHHHHHHHHHHHHHHHHHHHH |
281 | 298 | @c IIIIIIIIIIIIIIIIIIIIIIIIII |
299 | + | |
300 | +@cindex @code{.inst} directive, AArch64 | |
301 | +@item .inst @var{expressions} | |
302 | +Inserts the expressions into the output as if they were instructions, | |
303 | +rather than data. | |
304 | + | |
282 | 305 | @c JJJJJJJJJJJJJJJJJJJJJJJJJJ |
283 | 306 | @c KKKKKKKKKKKKKKKKKKKKKKKKKK |
284 | 307 | @c LLLLLLLLLLLLLLLLLLLLLLLLLL |
@@ -324,6 +347,18 @@ example: | ||
324 | 347 | |
325 | 348 | @c TTTTTTTTTTTTTTTTTTTTTTTTTT |
326 | 349 | |
350 | +@cindex @code{.tlsdescadd} directive, AArch64 | |
351 | +@item @code{.tlsdescadd} | |
352 | +Emits a TLSDESC_ADD reloc on the next instruction. | |
353 | + | |
354 | +@cindex @code{.tlsdesccall} directive, AArch64 | |
355 | +@item @code{.tlsdesccall} | |
356 | +Emits a TLSDESC_CALL reloc on the next instruction. | |
357 | + | |
358 | +@cindex @code{.tlsdescldr} directive, AArch64 | |
359 | +@item @code{.tlsdescldr} | |
360 | +Emits a TLSDESC_LDR reloc on the next instruction. | |
361 | + | |
327 | 362 | @c UUUUUUUUUUUUUUUUUUUUUUUUUU |
328 | 363 | |
329 | 364 | @cindex @code{.unreq} directive, AArch64 |
@@ -344,12 +379,14 @@ should only be done if it is really necessary. | ||
344 | 379 | |
345 | 380 | @c WWWWWWWWWWWWWWWWWWWWWWWWWW |
346 | 381 | @c XXXXXXXXXXXXXXXXXXXXXXXXXX |
347 | -@c YYYYYYYYYYYYYYYYYYYYYYYYYY | |
348 | -@c ZZZZZZZZZZZZZZZZZZZZZZZZZZ | |
349 | 382 | |
350 | 383 | @cindex @code{.xword} directive, AArch64 |
351 | -@item .xword | |
352 | -The @code{.xword} directive produces 64 bit values. | |
384 | +@item .xword @var{expressions} | |
385 | +The @code{.xword} directive produces 64 bit values. This is the same | |
386 | +as the @code{.dword} directive. | |
387 | + | |
388 | +@c YYYYYYYYYYYYYYYYYYYYYYYYYY | |
389 | +@c ZZZZZZZZZZZZZZZZZZZZZZZZZZ | |
353 | 390 | |
354 | 391 | @end table |
355 | 392 |