Revision | efb40d49549762309a1a2b6efc70165c9c298b77 (tree) |
---|---|
Zeit | 2019-12-21 22:42:42 |
Autor | Yoshinori Sato <ysato@user...> |
Commiter | Yoshinori Sato |
Fix instructions
@@ -146,6 +146,14 @@ BAND_r 0111 0110 0... .... @b2_bop_r | ||
146 | 146 | BAND_m 0111 1100 .... 0000 0111 0110 0 ... 0000 @b4_bop_m |
147 | 147 | # BAND #xx:3,@aa:8 |
148 | 148 | BAND_a 0111 1110 .... .... 0111 0110 0 ... 0000 @b4_bop_a |
149 | +# BCLR #xx:3,@aa:16 | |
150 | +# BCLR Rn,@aa:16 | |
151 | +# BNOT #xx:3,@aa:16 | |
152 | +# BNOT Rn,@aa:16 | |
153 | +# BTST #xx:3,@aa:16 | |
154 | +# BTST Rn,@aa:16 | |
155 | +# BSET #xx:3,@aa:16 | |
156 | +# BSET Rn,@aa:16 | |
149 | 157 | # BAND #xx:3,@aa:16 |
150 | 158 | # BIAND #xx:3,@aa:16 |
151 | 159 | # BILD #xx:3,@aa:16 |
@@ -157,6 +165,14 @@ BAND_a 0111 1110 .... .... 0111 0110 0 ... 0000 @b4_bop_a | ||
157 | 165 | # BST #xx:3,@aa:16 |
158 | 166 | # BXOR #xx:3,@aa:16 |
159 | 167 | BOP1 0110 1010 0001 0000 .... .... .... .... @b6_bop |
168 | +# BCLR #xx:3,@aa:32 | |
169 | +# BCLR Rn,@aa:32 | |
170 | +# BNOT #xx:3,@aa:32 | |
171 | +# BNOT Rn,@aa:32 | |
172 | +# BTST #xx:3,@aa:32 | |
173 | +# BTST Rn,@aa:32 | |
174 | +# BSET #xx:3,@aa:32 | |
175 | +# BSET Rn,@aa:32 | |
160 | 176 | # BAND #xx:3,@aa:32 |
161 | 177 | # BIAND #xx:3,@aa:32 |
162 | 178 | # BILD #xx:3,@aa:32 |
@@ -1920,6 +1920,14 @@ static bool trans_BXOR_a(DisasContext *ctx, arg_BXOR_a *a) | ||
1920 | 1920 | |
1921 | 1921 | static bool trans_BOP1(DisasContext *ctx, arg_BOP1 *a) |
1922 | 1922 | { |
1923 | + arg_BCLR_ia bclr_i; | |
1924 | + arg_BCLR_ra bclr_r; | |
1925 | + arg_BNOT_ia bnot_i; | |
1926 | + arg_BNOT_ra bnot_r; | |
1927 | + arg_BTST_ia btst_i; | |
1928 | + arg_BTST_ra btst_r; | |
1929 | + arg_BSET_ia bset_i; | |
1930 | + arg_BSET_ra bset_r; | |
1923 | 1931 | arg_BAND_a band_a; |
1924 | 1932 | arg_BIAND_a biand_a; |
1925 | 1933 | arg_BLD_a bld_a; |
@@ -1932,6 +1940,38 @@ static bool trans_BOP1(DisasContext *ctx, arg_BOP1 *a) | ||
1932 | 1940 | arg_BIXOR_a bixor_a; |
1933 | 1941 | |
1934 | 1942 | switch(a->op) { |
1943 | + case 0x70: | |
1944 | + bset_i.imm = a->ir; | |
1945 | + bset_i.abs = a->abs; | |
1946 | + return trans_BSET_ia(ctx, &bset_i); | |
1947 | + case 0x60: | |
1948 | + bset_r.rn = a->ir; | |
1949 | + bset_r.abs = a->abs; | |
1950 | + return trans_BSET_ra(ctx, &bset_r); | |
1951 | + case 0x71: | |
1952 | + bnot_i.imm = a->ir; | |
1953 | + bnot_i.abs = a->abs; | |
1954 | + return trans_BNOT_ia(ctx, &bnot_i); | |
1955 | + case 0x61: | |
1956 | + bnot_r.rn = a->ir; | |
1957 | + bnot_r.abs = a->abs; | |
1958 | + return trans_BNOT_ra(ctx, &bnot_r); | |
1959 | + case 0x72: | |
1960 | + bclr_i.imm = a->ir; | |
1961 | + bclr_i.abs = a->abs; | |
1962 | + return trans_BCLR_ia(ctx, &bclr_i); | |
1963 | + case 0x62: | |
1964 | + bclr_r.rn = a->ir; | |
1965 | + bclr_r.abs = a->abs; | |
1966 | + return trans_BCLR_ra(ctx, &bclr_r); | |
1967 | + case 0x73: | |
1968 | + btst_i.imm = a->ir; | |
1969 | + btst_i.abs = a->abs; | |
1970 | + return trans_BTST_ia(ctx, &btst_i); | |
1971 | + case 0x63: | |
1972 | + btst_r.rn = a->ir; | |
1973 | + btst_r.abs = a->abs; | |
1974 | + return trans_BTST_ra(ctx, &btst_r); | |
1935 | 1975 | case 0x76: |
1936 | 1976 | band_a.imm = a->ir; |
1937 | 1977 | band_a.abs = a->abs; |
@@ -2492,23 +2532,26 @@ static bool trans_RTS(DisasContext *ctx, arg_RTS *a) | ||
2492 | 2532 | |
2493 | 2533 | static bool trans_RTE(DisasContext *ctx, arg_RTE *a) |
2494 | 2534 | { |
2495 | - TCGv ccr, reg; | |
2496 | - ccr = tcg_temp_new(); | |
2535 | + TCGv temp1, temp2, reg; | |
2536 | + temp1 = tcg_temp_new(); | |
2537 | + temp2 = tcg_temp_new(); | |
2497 | 2538 | reg = tcg_temp_new(); |
2498 | 2539 | if (ctx->base.tb->flags == 2) { |
2499 | - tcg_gen_qemu_ld_i32(ccr, cpu_sp, 0, MO_16 | MO_TE); | |
2540 | + tcg_gen_qemu_ld_i32(temp1, cpu_sp, 0, MO_16 | MO_TE); | |
2500 | 2541 | tcg_gen_addi_i32(cpu_sp, cpu_sp, 2); |
2501 | - tcg_gen_extract_i32(ccr, ccr, 8, 8); | |
2542 | + tcg_gen_extract_i32(temp2, temp1, 8, 8); | |
2502 | 2543 | tcg_gen_movi_i32(reg, 1); |
2503 | - gen_helper_set_ccr(cpu_env, reg, ccr); | |
2544 | + gen_helper_set_ccr(cpu_env, reg, temp2); | |
2504 | 2545 | } |
2505 | - tcg_gen_qemu_ld_i32(ccr, cpu_sp, 0, MO_32 | MO_TE); | |
2546 | + tcg_gen_qemu_ld_i32(temp1, cpu_sp, 0, MO_32 | MO_TE); | |
2506 | 2547 | tcg_gen_addi_i32(cpu_sp, cpu_sp, 4); |
2507 | - tcg_gen_extract_i32(cpu_pc, ccr, 0, 24); | |
2508 | - tcg_gen_extract_i32(ccr, ccr, 24, 8); | |
2509 | - gen_helper_set_ccr(cpu_env, reg, ccr); | |
2548 | + tcg_gen_extract_i32(cpu_pc, temp1, 0, 24); | |
2549 | + tcg_gen_extract_i32(temp2, temp1, 24, 8); | |
2550 | + tcg_gen_movi_i32(reg, 0); | |
2551 | + gen_helper_set_ccr(cpu_env, reg, temp2); | |
2510 | 2552 | ctx->base.is_jmp = DISAS_EXIT; |
2511 | - tcg_temp_free(ccr); | |
2553 | + tcg_temp_free(temp1); | |
2554 | + tcg_temp_free(temp2); | |
2512 | 2555 | tcg_temp_free(reg); |
2513 | 2556 | return true; |
2514 | 2557 | } |