hardware/intel/intel-driver
Revision | 759e44d4cbe78cf12d287799cee5ff519080052d (tree) |
---|---|
Zeit | 2016-03-17 09:59:35 |
Autor | peng.chen <peng.c.chen@inte...> |
Commiter | Xiang, Haihao |
update PIPE_MODE command setting for VP9 decoding
v2:
modify the commit message
v1:
initial
Signed-off-by: peng.chen <peng.c.chen@intel.com>
@@ -189,13 +189,23 @@ gen9_hcpd_pipe_mode_select(VADriverContextP ctx, | ||
189 | 189 | int codec, |
190 | 190 | struct gen9_hcpd_context *gen9_hcpd_context) |
191 | 191 | { |
192 | + struct i965_driver_data *i965 = i965_driver_data(ctx); | |
192 | 193 | struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; |
193 | 194 | |
194 | 195 | assert((codec == HCP_CODEC_HEVC) || (codec == HCP_CODEC_VP9)); |
195 | 196 | |
196 | - BEGIN_BCS_BATCH(batch, 4); | |
197 | + if(IS_KBL(i965->intel.device_info)) | |
198 | + { | |
199 | + BEGIN_BCS_BATCH(batch, 6); | |
197 | 200 | |
198 | - OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (4 - 2)); | |
201 | + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (6 - 2)); | |
202 | + } | |
203 | + else | |
204 | + { | |
205 | + BEGIN_BCS_BATCH(batch, 4); | |
206 | + | |
207 | + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (4 - 2)); | |
208 | + } | |
199 | 209 | OUT_BCS_BATCH(batch, |
200 | 210 | (codec << 5) | |
201 | 211 | (0 << 3) | /* disable Pic Status / Error Report */ |
@@ -203,6 +213,16 @@ gen9_hcpd_pipe_mode_select(VADriverContextP ctx, | ||
203 | 213 | OUT_BCS_BATCH(batch, 0); |
204 | 214 | OUT_BCS_BATCH(batch, 0); |
205 | 215 | |
216 | + if(IS_KBL(i965->intel.device_info)) | |
217 | + { | |
218 | + if(codec == HCP_CODEC_VP9) | |
219 | + OUT_BCS_BATCH(batch, 1<<6); | |
220 | + else | |
221 | + OUT_BCS_BATCH(batch, 0); | |
222 | + | |
223 | + OUT_BCS_BATCH(batch, 0); | |
224 | + } | |
225 | + | |
206 | 226 | ADVANCE_BCS_BATCH(batch); |
207 | 227 | } |
208 | 228 |