Common Source Code Project for Qt (a.k.a for FM-7).
Revision | f615baf0f7facd35043882b1c4979be29df56aed (tree) |
---|---|
Zeit | 2019-09-13 14:12:38 |
Autor | K.Ohta <whatisthis.sowhat@gmai...> |
Commiter | K.Ohta |
[VM][FMTOWNS] MEMORY: Re-Implementing from MEMORY.
@@ -83,8 +83,10 @@ void AD7820KR::event_callback(int event_id, int err) | ||
83 | 83 | overflow = true; |
84 | 84 | _n = -16384; |
85 | 85 | } |
86 | - _n = _n / 128; | |
87 | - _n = _n + 128; | |
86 | + _n = _n + 16384; | |
87 | + _n >>= 7; | |
88 | + //_n = _n / 128; | |
89 | + //_n = _n + 128; | |
88 | 90 | if(wr_rd_mode) { |
89 | 91 | adc_data = ((adc_msb & 0xf0) | (_n & 0x0f)); |
90 | 92 | } else { |
@@ -16,27 +16,69 @@ namespace FMTOWNS { | ||
16 | 16 | |
17 | 17 | void TOWNS_MEMORY::initialize() |
18 | 18 | { |
19 | - | |
19 | + MEMORY::initialize(); | |
20 | + | |
20 | 21 | extra_nmi_mask = true; |
21 | 22 | extra_nmi_val = false; |
22 | 23 | |
23 | 24 | vram_wait_val = 6; |
24 | 25 | mem_wait_val = 3; |
25 | 26 | |
26 | - | |
27 | + set_memory_rw(0x00000000, 0x000bffff, ram_page0); | |
28 | + set_memory_mapped_io_rw(0x000c0000, 0x000c7fff, d_vram); // PLANE ACCESSED VRAM(EMULATED) | |
29 | + set_memory_mapped_io_rw(0x000c8000, 0x000c8fff, d_vram); // TEXT VRAM (EMULATED) | |
30 | + set_memory_mapped_io_rw(0x000c9000, 0x000c9fff, d_vram); // VRAM RESERVED | |
31 | + set_memory_mapped_io_rw(0x000ca000, 0x000cafff, d_vram); // ANKCG1 / IO / RAM | |
32 | + set_memory_mapped_io_rw(0x000cb000, 0x000cbfff, d_cgrom); // ANKCG1 / IO / RAM | |
33 | + set_memory_mapped_io_rw(0x000cc000, 0x000cffff, d_vram); // MMIO / RAM | |
34 | + set_memory_mapped_io_rw(0x000d0000, 0x000d7fff, d_dictionary); // DICTIONARY (BANKED) | |
35 | + set_memory_mapped_io_rw(0x000d8000, 0x000d9fff, d_sram); // SRAM (LEARN/GAIJI) | |
36 | + unset_memory_rw(0x000da000, 0x000effff); // RESERVED | |
37 | + | |
38 | + set_memory_rw(0x000f0000, 0x000f7fff, ram_pagef); | |
39 | + set_memory_mapped_io_rw(0x000f8000, 0x000fffff, d_sysrom); // SYSROM / RAM | |
40 | + | |
41 | + unset_memory_rw(0x00100000, 0x3fffffff); | |
42 | + extra_ram_size = extra_ram_size & 0x3ff00000; | |
43 | + if(extra_ram_size >= 0x00100000) { | |
44 | + extra_ram = malloc(extra_ram_size); | |
45 | + if(extra_ram != NULL) { | |
46 | + set_memory_rw(0x00100000, (extra_ram_size + 0x00100000) - 1, extra_ram); | |
47 | + memset(extra_ram, 0x00, extra_ram_size); | |
48 | + } | |
49 | + } | |
27 | 50 | memset(ram_page0, 0x00, sizeof(ram_page0)); |
51 | + memset(ram_pagef, 0x00, sizeof(ram_pagef)); | |
28 | 52 | |
29 | - // load rom image | |
53 | + unset_memory_rw(0x40000000, 0x7fffffff); // EXTRA SLOT | |
54 | + set_memory_mapped_io_rw(0x80000000, 0x8007ffff, d_display); // VRAM | |
55 | + unset_memory_rw(0x80080000, 0x800fffff); // RESERVED VRAM | |
56 | + set_memory_mapped_io_rw(0x80100000, 0x8017ffff, d_display); // VRAM | |
57 | + unset_memory_rw(0x80180000, 0x801fffff); // RESERVED VRAM | |
58 | + unset_memory_rw(0x80200000, 0x80ffffff); // RESERVED VRAM | |
59 | + set_memory_mapped_io_rw(0x81000000, 0x8101ffff, d_sprite); // SPRITE PATTERN | |
60 | + | |
61 | + unset_memory_rw(0xc0000000, 0xc1ffffff); // Reserved | |
62 | + if(d_romcard[0] != NULL) { | |
63 | + set_memory_mapped_io_rw(0xc0000000, 0xc0ffffff, d_romcard[0]); // DICTIONARY ROM | |
64 | + } | |
30 | 65 | #if 0 |
31 | - if(fio->Fopen(create_local_path(_T("FMT_F20.ROM")), FILEIO_READ_BINARY)) { // 20 pixels FONT : Optional | |
32 | - fio->Fread(rom_font20, sizeof(rom_font20), 1); | |
33 | - fio->Fclose(); | |
66 | + if(d_romcard[1] != NULL) { | |
67 | + set_memory_mapped_io_rw(0xc1000000, 0xc1ffffff, d_romcard[1]); // DICTIONARY ROM | |
34 | 68 | } |
35 | 69 | #endif |
36 | - // ToDo: Will move to config. | |
37 | - extram_size = TOWNS_EXTRAM_PAGES * 0x100000; | |
38 | - // ToDo: Limit extram_size per VM. | |
39 | - extram = (uint8_t *)malloc(extram_size); | |
70 | + set_memory_mapped_io_rw(0xc2000000, 0xc207ffff, d_msdos); // MSDOS | |
71 | + set_memory_mapped_io_rw(0xc2080000, 0xc20fffff, d_dictionary); // DICTIONARY ROM | |
72 | + set_memory_mapped_io_rw(0xc2100000, 0xc213ffff, d_font); // FONT ROM | |
73 | + set_memory_mapped_io_rw(0xc2140000, 0xc2141fff, d_sram); // LEARN RAM | |
74 | + unset_memory_rw(0xc2142000, 0xc21ffffff); // Reserved | |
75 | + | |
76 | + set_memory_mapped_io_rw(0xc2200000, 0xc2200fff, d_pcm); // PCM RAM (ToDo:) | |
77 | + | |
78 | + unset_memory_rw(0xc2201000, 0xfffbffff); // Reserved | |
79 | + set_memory_mapped_io_rw(0xfffc0000, 0xffffffff, d_sysrom); | |
80 | + | |
81 | + // load rom image | |
40 | 82 | // ToDo: More smart. |
41 | 83 | vram_size = 0x80000; // OK? |
42 | 84 |
@@ -46,6 +88,13 @@ void TOWNS_MEMORY::initialize() | ||
46 | 88 | initialize_tables(); |
47 | 89 | } |
48 | 90 | |
91 | +void TOWNS_MEMORY::release() | |
92 | +{ | |
93 | + if(extra_ram != NULL) { | |
94 | + free(extra_ram); | |
95 | + extra_ram = NULL; | |
96 | + } | |
97 | +} | |
49 | 98 | void TOWNS_MEMORY::reset() |
50 | 99 | { |
51 | 100 | // reset memory |
@@ -55,489 +104,7 @@ void TOWNS_MEMORY::reset() | ||
55 | 104 | dma_addr_mask = 0x00ffffff; |
56 | 105 | d_cpu->set_address_mask(0xffffffff); |
57 | 106 | } |
58 | - | |
59 | -bool TOWNS_MEMORY::check_bank(uint32_t addr, uint32_t *mask, uint32_t *offset, void** readfn, void** writefn, void** readp, void** writep) | |
60 | -{ | |
61 | - uint8_t __type = (uint8_t)(type_bank_adrs_cx[banknum] >> 24); | |
62 | - uint32_t __offset = type_bank_adrs_cx[banknum] & 0x00ffffff; | |
63 | - if(offset == NULL) return false; | |
64 | - if(mask == NULL) return false; | |
65 | - if(readfn == NULL) return false; | |
66 | - if(writefn == NULL) return false; | |
67 | - if(readp == NULL) return false; | |
68 | - if(writep == NULL) return false; | |
69 | - | |
70 | - *readfn = NULL; | |
71 | - *writefn = NULL; | |
72 | - *readp = NULL; | |
73 | - *writep = NULL; | |
74 | - *mask = 0x00; | |
75 | - *offset = 0; | |
76 | - switch(__type) { | |
77 | - case TOWNS_MEMORY_FMR_VRAM: | |
78 | - if(!mainmem_enabled) { | |
79 | - *readfn = (void *)d_vram; | |
80 | - *writefn = (void *)d_vram; | |
81 | - *offset = FMTOWNS_VRAM_PLANE_ACCESS; | |
82 | - *mask = 0x7fff; | |
83 | - } else { | |
84 | - *readp = (void *)(&(ram_0c0[addr & 0x7fff])); | |
85 | - *writep = (void *)(&(ram_0c0[addr & 0x7fff])); | |
86 | - *mask = 0x7fff; | |
87 | - } | |
88 | - break; | |
89 | - case TOWNS_MEMORY_FMR_TEXT: | |
90 | - if(!mainmem_enabled) { | |
91 | - if((addr & 0x1000) == 0) { | |
92 | - *readfn = (void *)d_vram; | |
93 | - *writefn = (void *)d_vram; | |
94 | - *offset = FMTOWNS_VRAM_TEXT_VRAM; | |
95 | - *mask = 0x0fff; | |
96 | - } else { | |
97 | - *mask = 0x1fff; | |
98 | - *readp = (void*)(&(ram_0c8[addr & 0x1fff])); | |
99 | - *writedp = (void*)(&(ram_0c8[addr & 0x1fff])); | |
100 | - } | |
101 | - } else { | |
102 | - *mask = 0x1fff; | |
103 | - *readp = (void*)(&(ram_0c8[addr & 0x1fff])); | |
104 | - *writedp = (void*)(&(ram_0c8[addr & 0x1fff])); | |
105 | - } | |
106 | - break; | |
107 | - case TOWNS_MEMORY_MMIO_0CC: | |
108 | - if(!mainmem_enabled) { | |
109 | - if((addr & 0xfffff) < 0xcff80) { | |
110 | - *mask = 0x3fff; | |
111 | - *readp = (void*)(&(ram_0cc[addr & 0x3fff])); | |
112 | - *writedp = (void*)(&(ram_0cc[addr & 0x3fff])); | |
113 | - } | |
114 | - } else { | |
115 | - *mask = 0x3fff; | |
116 | - *readp = (void*)(&(ram_0cc[addr & 0x3fff])); | |
117 | - *writedp = (void*)(&(ram_0cc[addr & 0x3fff])); | |
118 | - } | |
119 | - break; | |
120 | - case TOWNS_MEMORY_SPRITE_ANKCG1: | |
121 | - if(!mainmem_enabled) { | |
122 | - if(ankcg_enabled) { | |
123 | - *offset = 0x000ca000; | |
124 | - *mask = 0x0fff; | |
125 | - *readfn = (void *)d_fonts; | |
126 | - *writefn = (void *)d_fonts; | |
127 | - } else { | |
128 | - *offset = 0x2000 + FMTOWNS_VRAM_TEXT_VRAM; | |
129 | - *mask = 0x0fff; | |
130 | - *readfn = (void *)d_vram; | |
131 | - *writefn = (void *)d_vram; | |
132 | - } | |
133 | - } else { | |
134 | - *readp = (void*)(&(ram_0ca[addr & 0xfff])); | |
135 | - *writep = (void*)(&(ram_0ca[addr & 0xfff])); | |
136 | - } | |
137 | - break; | |
138 | - case TOWNS_MEMORY_SPRITE_ANKCG2: | |
139 | - if(!(mainmem_enabled) && (ankcg_enabled)) { | |
140 | - *offset = 0x000cb000; | |
141 | - *mask = 0x0fff; | |
142 | - *readfn = (void *)d_fonts; | |
143 | - *writefn = (void *)d_fonts; | |
144 | - } else { | |
145 | - *readp = (void*)(&(ram_0cb[addr & 0xfff])); | |
146 | - *writep = (void*)(&(ram_0cb[addr & 0xfff])); | |
147 | - *mask = 0xfff; | |
148 | - *offset = 0; | |
149 | - } | |
150 | - break; | |
151 | - default: | |
152 | - return false; | |
153 | - break; | |
154 | - } | |
155 | - return true; | |
156 | 107 | |
157 | -} | |
158 | - | |
159 | - | |
160 | -uint32_t TOWNS_MEMORY::read_data_base(uint32_t addr, int* wait, int wordsize) | |
161 | -{ | |
162 | - uint8_t *maddr; | |
163 | - DEVICE *daddr; | |
164 | - uint32_t banknum = addr >> 12; | |
165 | - uint32_t _naddr; | |
166 | - switch(wordsize) { | |
167 | - case 2: | |
168 | - _naddr = addr & 0xfffffffe; | |
169 | - break; | |
170 | - case 4: | |
171 | - _naddr = addr & 0xfffffffc; | |
172 | - break; | |
173 | - dafault: | |
174 | - _naddr = addr; | |
175 | - break; | |
176 | - } | |
177 | - | |
178 | - maddr = read_bank_adrs_cx[banknum]; | |
179 | - if(maddr != NULL) { | |
180 | - // Memory found. | |
181 | - if(wait != NULL) *wait = mem_wait_val; | |
182 | - uint8_t *p; | |
183 | - switch(wordsize) { | |
184 | - case 1: | |
185 | - p = &maddr[addr & 0x00000fff]; | |
186 | - return (uint32_t)(*p); | |
187 | - break; | |
188 | - case 2: | |
189 | - { | |
190 | - pair16_t _d; | |
191 | - p = &maddr[addr & 0x00000ffe]; | |
192 | -#if defined(__LITTLE_ENDIAN__) | |
193 | - uint16_t* pp = (uint16_t*)p; | |
194 | - _d.u16 = *pp; | |
195 | -#else | |
196 | - _d.l = p[0]; | |
197 | - _d.h = p[1]; | |
198 | -#endif | |
199 | - return _d.u16; | |
200 | - } | |
201 | - break; | |
202 | - case 4: | |
203 | - { | |
204 | - pair32_t _d; | |
205 | - p = &maddr[addr & 0x00000ffc]; | |
206 | -#if defined(__LITTLE_ENDIAN__) | |
207 | - uint32_t* pp = (uint32_t*)p; | |
208 | - _d.u32 = *pp; | |
209 | -#else | |
210 | - _d.l = p[0]; | |
211 | - _d.h = p[1]; | |
212 | - _d.h2 = p[2]; | |
213 | - _d.h3 = p[3]; | |
214 | -#endif | |
215 | - return _d.u32; | |
216 | - } | |
217 | - break; | |
218 | - default: | |
219 | - return 0xffffffff; // Word size error | |
220 | - break; | |
221 | - } | |
222 | - } else { | |
223 | - daddr = device_bank_adrs_cx[banknum]; | |
224 | - if(daddr != NULL) { | |
225 | - // Device chained. | |
226 | - switch(wordsize) { | |
227 | - case 1: | |
228 | - return daddr->read_data8w(addr, wait); | |
229 | - break; | |
230 | - case 2: | |
231 | - return daddr->read_data16w(addr, wait); | |
232 | - break; | |
233 | - case 4: | |
234 | - return daddr->read_data32w(addr, wait); | |
235 | - break; | |
236 | - default: | |
237 | - return 0xffffffff; | |
238 | - break; | |
239 | - } | |
240 | - } else { | |
241 | - uint32_t _mask; | |
242 | - uint32_t _offset; | |
243 | - DEVICE* readfn; | |
244 | - DEVICE* writefn; | |
245 | - uint8_t* readp; | |
246 | - uint8_t* writep; | |
247 | - if(check_bank(_naddr, &_mask, &_offset, (void**)(&readfn), (void**)(&writefn), (void**)(&readp), (void**)(&writep))) { | |
248 | - switch(wordsize) | |
249 | - { | |
250 | - case 1: | |
251 | - if(readp != NULL) { | |
252 | - if(wait != NULL) *wait = mem_wait_val; | |
253 | - return (uint32_t)(*readp); | |
254 | - } else if(readfn != NULL) { | |
255 | - return readfn->read_data8w(_naddr, wait); | |
256 | - } else { | |
257 | - return 0xff; | |
258 | - } | |
259 | - break; | |
260 | - case 2: | |
261 | - if(readp != NULL) { | |
262 | - | |
263 | - if(wait != NULL) *wait = mem_wait_val; | |
264 | -#if defined(__LITTLE_ENDIAN__) | |
265 | - uint16_t *pp = (uint16_t*)readp; | |
266 | - return (uint32_t)(*pp); | |
267 | -#else | |
268 | - pair16_t _d; | |
269 | - pair16_t *pp = (pair16_t*)readp; | |
270 | - _d.l = pp[0]; | |
271 | - _d.h = pp[1]; | |
272 | - return _d.u16; | |
273 | -#endif | |
274 | - } else if(readfn != NULL) { | |
275 | - return readfn->read_data16w(_naddr, wait); | |
276 | - } else { | |
277 | - return 0xffff; | |
278 | - } | |
279 | - break; | |
280 | - case 2: | |
281 | - if(readp != NULL) { | |
282 | - | |
283 | - if(wait != NULL) *wait = mem_wait_val; | |
284 | -#if defined(__LITTLE_ENDIAN__) | |
285 | - uint32_t *pp = (uint32_t*)readp; | |
286 | - return (uint32_t)(*pp); | |
287 | -#else | |
288 | - pair32_t _d; | |
289 | - _d.l = readp[0]; | |
290 | - _d.h = readp[1]; | |
291 | - _d.h2 = readp[2]; | |
292 | - _d.h3 = readp[3]; | |
293 | - return _d.u32; | |
294 | -#endif | |
295 | - } else if(readfn != NULL) { | |
296 | - return readfn->read_data32w(_naddr, wait); | |
297 | - } else { | |
298 | - return 0xffffffff; | |
299 | - } | |
300 | - break; | |
301 | - default: | |
302 | - return 0xffffffff; | |
303 | - break; | |
304 | - } | |
305 | - // Function or memory don't exist this bank. | |
306 | - } else { | |
307 | - // Bank not registered. | |
308 | - if((addr >= 0x000cff80) && (addr <= 0x000cffff)) { | |
309 | - bool _hit; | |
310 | - uint32_t val; | |
311 | - val = read_mmio(addr, wait, &_hit); | |
312 | - if(!_hit) { | |
313 | - /// | |
314 | - } else { | |
315 | - return val; | |
316 | - } | |
317 | - } | |
318 | - } | |
319 | - } | |
320 | - // Neither memory nor device nor bank. | |
321 | - } | |
322 | - return 0xffffffff; | |
323 | -} | |
324 | - | |
325 | -uint32_t TOWNS_MEMORY::read_data8w(uint32_t addr, int *wait) | |
326 | -{ | |
327 | - return read_data_base(addr, wait, 1); | |
328 | -} | |
329 | -uint32_t TOWNS_MEMORY::read_data16w(uint32_t addr, int *wait) | |
330 | -{ | |
331 | - return read_data_base(addr, wait, 2); | |
332 | -} | |
333 | - | |
334 | -uint32_t TOWNS_MEMORY::read_data32w(uint32_t addr, int *wait) | |
335 | -{ | |
336 | - return read_data_base(addr, wait, 4); | |
337 | -} | |
338 | - | |
339 | -void TOWNS_MEMORY::write_data_base(uint32_t addr, uint32_t data, int* wait, int wordsize) | |
340 | -{ | |
341 | - uint8_t *maddr; | |
342 | - DEVICE *daddr; | |
343 | - uint32_t banknum = addr >> 12; | |
344 | - uint32_t _naddr; | |
345 | - switch(wordsize) { | |
346 | - case 2: | |
347 | - _naddr = addr & 0xfffffffe; | |
348 | - break; | |
349 | - case 4: | |
350 | - _naddr = addr & 0xfffffffc; | |
351 | - break; | |
352 | - dafault: | |
353 | - _naddr = addr; | |
354 | - break; | |
355 | - } | |
356 | - | |
357 | - maddr = write_bank_adrs_cx[banknum]; | |
358 | - if(maddr != NULL) { | |
359 | - // Memory found. | |
360 | - if(wait != NULL) *wait = mem_wait_val; | |
361 | - uint8_t *p; | |
362 | - switch(wordsize) { | |
363 | - case 1: | |
364 | - p = &maddr[addr & 0x00000fff]; | |
365 | - *p = (uint8_t)data; | |
366 | - return; | |
367 | - break; | |
368 | - case 2: | |
369 | - { | |
370 | - pair16_t _d; | |
371 | - _d.u16 = (uint16_t)data; | |
372 | - p = &maddr[addr & 0x00000ffe]; | |
373 | -#if defined(__LITTLE_ENDIAN__) | |
374 | - uint16_t* pp = (uint16_t*)p; | |
375 | - *pp = _d.u16; | |
376 | -#else | |
377 | - p[0] = _d.l; | |
378 | - p[1] = _d.h; | |
379 | -#endif | |
380 | - return; | |
381 | - } | |
382 | - break; | |
383 | - case 4: | |
384 | - { | |
385 | - pair32_t _d; | |
386 | - _d.u32 = data; | |
387 | - p = &maddr[addr & 0x00000ffc]; | |
388 | -#if defined(__LITTLE_ENDIAN__) | |
389 | - uint32_t* pp = (uint32_t*)p; | |
390 | - *pp = data; | |
391 | -#else | |
392 | - p[0] = _d.l; | |
393 | - p[1] = _d.h; | |
394 | - p[2] = _d.h2; | |
395 | - p[3] = _d.h3; | |
396 | -#endif | |
397 | - return; | |
398 | - } | |
399 | - break; | |
400 | - default: | |
401 | - return; // Word size error | |
402 | - break; | |
403 | - } | |
404 | - } else { | |
405 | - daddr = device_bank_adrs_cx[banknum]; | |
406 | - if(daddr != NULL) { | |
407 | - // Device chained. | |
408 | - switch(wordsize) { | |
409 | - case 1: | |
410 | - daddr->write_data8w(addr, data, wait); | |
411 | - break; | |
412 | - case 2: | |
413 | - daddr->write_data16w(addr, data, wait); | |
414 | - break; | |
415 | - case 4: | |
416 | - daddr->write_data32w(addr, data, wait); | |
417 | - break; | |
418 | - default: | |
419 | - break; | |
420 | - } | |
421 | - return; | |
422 | - } else { | |
423 | - uint32_t _mask; | |
424 | - uint32_t _offset; | |
425 | - DEVICE* readfn; | |
426 | - DEVICE* writefn; | |
427 | - uint8_t* readp; | |
428 | - uint8_t* writep; | |
429 | - if(check_bank(_naddr, &_mask, &_offset, (void**)(&readfn), (void**)(&writefn), (void**)(&readp), (void**)(&writep))) { | |
430 | - switch(wordsize) | |
431 | - { | |
432 | - case 1: | |
433 | - if(writep != NULL) { | |
434 | - if(wait != NULL) *wait = mem_wait_val; | |
435 | - *writep = (uint8_t)data; | |
436 | - } else if(writefn != NULL) { | |
437 | - writefn->write_data8w(_naddr, data, wait); | |
438 | - } | |
439 | - break; | |
440 | - case 2: | |
441 | - if(writep != NULL) { | |
442 | - | |
443 | - if(wait != NULL) *wait = mem_wait_val; | |
444 | -#if defined(__LITTLE_ENDIAN__) | |
445 | - uint16_t *pp = (uint16_t*)writep; | |
446 | - *pp = (uint16_t)data; | |
447 | -#else | |
448 | - pair16_t _d; | |
449 | - _d.u16 = (uint16_t)data; | |
450 | - writep[0] = _d.l; | |
451 | - writep[1] = _d.h; | |
452 | -#endif | |
453 | - } else if(writefn != NULL) { | |
454 | - writefn->write_data16w(_naddr, data, wait); | |
455 | - } | |
456 | - break; | |
457 | - case 4: | |
458 | - if(writep != NULL) { | |
459 | - | |
460 | - if(wait != NULL) *wait = mem_wait_val; | |
461 | -#if defined(__LITTLE_ENDIAN__) | |
462 | - uint32_t *pp = (uint32_t*)writep; | |
463 | - *pp = (uint32_t)data; | |
464 | -#else | |
465 | - pair32_t _d; | |
466 | - _d.u32 = data; | |
467 | - writep[0] = _d.l; | |
468 | - writep[1] = _d.h; | |
469 | - writep[2] = _d.h2; | |
470 | - writep[3] = _d.h3; | |
471 | -#endif | |
472 | - } else if(writefn != NULL) { | |
473 | - writefn->write_data32w(_naddr, data, wait); | |
474 | - } | |
475 | - break; | |
476 | - default: | |
477 | - break; | |
478 | - } | |
479 | - return; | |
480 | - // Function or memory don't exist this bank. | |
481 | - } else { | |
482 | - // Bank not registered. | |
483 | - if((addr >= 0x000cff80) && (addr <= 0x000cffff)) { | |
484 | - bool _hit; | |
485 | - write_mmio(addr, data, wait, &_hit); // ToDo: Not Hit | |
486 | - } | |
487 | - } | |
488 | - } | |
489 | - // Neither memory nor device nor bank. | |
490 | - } | |
491 | - return; | |
492 | -} | |
493 | - | |
494 | -void TOWNS_MEMORY::write_data8w(uint32_t addr, uint32_t data, int *wait) | |
495 | -{ | |
496 | - write_data_base(addr, data, wait, 1); | |
497 | -} | |
498 | - | |
499 | -void TOWNS_MEMORY::write_data16w(uint32_t addr, uint32_t data, int *wait) | |
500 | -{ | |
501 | - write_data_base(addr, data, wait, 2); | |
502 | -} | |
503 | - | |
504 | -void TOWNS_MEMORY::write_data32w(uint32_t addr, uint32_t data, int *wait) | |
505 | -{ | |
506 | - write_data_base(addr, data, wait, 4); | |
507 | -} | |
508 | - | |
509 | - | |
510 | - | |
511 | -uint32_t TOWNS_MEMORY::read_data8(uint32_t addr) | |
512 | -{ | |
513 | - return read_data_base(addr, NULL, 1); | |
514 | -} | |
515 | - | |
516 | -uint32_t TOWNS_MEMORY::read_data16(uint32_t addr) | |
517 | -{ | |
518 | - return read_data_base(addr, NULL, 2); | |
519 | -} | |
520 | - | |
521 | -uint32_t TOWNS_MEMORY::read_data32(uint32_t addr) | |
522 | -{ | |
523 | - return read_data_base(addr, NULL, 4); | |
524 | -} | |
525 | - | |
526 | -void TOWNS_MEMORY::write_data8(uint32_t addr, uint32_t data) | |
527 | -{ | |
528 | - write_data_base(addr, data, NULL, 1); | |
529 | -} | |
530 | - | |
531 | -void TOWNS_MEMORY::write_data16(uint32_t addr, uint32_t data) | |
532 | -{ | |
533 | - write_data_base(addr, data, NULL, 2); | |
534 | -} | |
535 | - | |
536 | -void TOWNS_MEMORY::write_data32(uint32_t addr, uint32_t data) | |
537 | -{ | |
538 | - write_data_base(addr, data, NULL, 4); | |
539 | -} | |
540 | - | |
541 | 108 | // Address (TOWNS BASIC): |
542 | 109 | // 0x0020 - 0x0022, 0x0030-0x0031, |
543 | 110 | // 0x0400 - 0x0404, |
@@ -855,148 +422,6 @@ void TOWNS_MEMORY::write_mmio(uint32_t addr, uint32_t data, int *wait, bool *hit | ||
855 | 422 | if(hit != NULL) *hit = found; |
856 | 423 | return; |
857 | 424 | } |
858 | - | |
859 | -void TOWNS_MEMORY::initialize_tables(void) | |
860 | -{ | |
861 | - // Address Cx000000 | |
862 | - memset(write_bank_adrs_cx, 0x00, sizeof(write_bank_adrs_cx)); | |
863 | - memset(read_bank_adrs_cx, 0x00, sizeof(read_bank_adrs_cx)); | |
864 | - memset(device_bank_adrs_cx, 0x00, sizeof(device_bank_adrs_cx)); | |
865 | - memset(type_bank_adrs_cx, 0x00, sizeof(type_bank_adrs_cx)); | |
866 | - | |
867 | - // PAGE0 | |
868 | - for(uint32_t ui = 0x00000; ui < 0x000c0; ui++) { // $00000000 - $000bffff | |
869 | - read_bank_adrs_cx[ui] = &(ram_page0[ui << 12]); | |
870 | - write_bank_adrs_cx[ui] = &(ram_page0[ui << 12]); | |
871 | - } | |
872 | - | |
873 | - for(uint32_t ui = 0x000c0; ui < 0x000c8; ui++) { // $000c0000 - $000effff | |
874 | - type_bank_adrs_cx[ui] = (TOWNS_MEMORY_FMR_VRAM << 24) | ((ui - 0xc0) << 12); | |
875 | - } | |
876 | - for(uint32_t ui = 0x000c8; ui < 0x000c9; ui++) { // $000c0000 - $000effff | |
877 | - type_bank_adrs_cx[ui] = (TOWNS_MEMORY_FMR_TEXT << 24) | ((ui - 0xc8) << 12); | |
878 | - } | |
879 | - for(uint32_t ui = 0x000c9; ui < 0x000ca; ui++) { // $000c0000 - $000effff | |
880 | - type_bank_adrs_cx[ui] = (TOWNS_MEMORY_FMR_VRAM_RESERVE << 24) | ((ui - 0xc8) << 12); | |
881 | - } | |
882 | - for(uint32_t ui = 0x000ca; ui < 0x000cb; ui++) { // $000c0000 - $000effff | |
883 | - type_bank_adrs_cx[ui] = (TOWNS_MEMORY_SPRITE_ANKCG1 << 24) | ((ui - 0xca) << 12); | |
884 | - } | |
885 | - for(uint32_t ui = 0x000cb; ui < 0x000cc; ui++) { // $000c0000 - $000effff | |
886 | - type_bank_adrs_cx[ui] = (TOWNS_MEMORY_ANKCG2 << 24) | ((ui - 0xcb) << 12); | |
887 | - } | |
888 | - for(uint32_t ui = 0x000cc; ui < 0x000d0; ui++) { // $000c0000 - $000effff | |
889 | - type_bank_adrs_cx[ui] = (TOWNS_MEMORY_MMIO_0CC << 24) | ((ui - 0xcc) << 12); | |
890 | - } | |
891 | - for(uint32_t ui = 0x000d0; ui < 0x000f0; ui++) { // $000c0000 - $000effff | |
892 | - device_bank_adrs_cx[ui] = d_dictionary; | |
893 | - } | |
894 | - for(uint32_t ui = 0x000f0; ui < 0x00100; ui++) { // $000f0000 - $000fffff | |
895 | - device_bank_adrs_cx[ui] = d_sysrom; | |
896 | - } | |
897 | - // Extra RAM | |
898 | - for(uint32_t ui = 0x00100; ui < (0x00100 + (extram_size >> 12)); ui++) { | |
899 | - read_bank_adrs_cx[ui] = &(extram[(ui - 0x100) << 12]); | |
900 | - write_bank_adrs_cx[ui] = &(extram[(ui - 0x100) << 12]); | |
901 | - } | |
902 | - // ToDo: EXTRA IO(0x40000000 - 0x80000000) | |
903 | - | |
904 | - // VRAM | |
905 | - /* | |
906 | - for(uint32_t ui = 0x000c0; ui < 0x000ca; ui++) { | |
907 | - device_bank_adrs_cx[ui] = d_vram; | |
908 | - } | |
909 | - for(uint32_t ui = 0x000ca; ui < 0x000cb; ui++) { | |
910 | - device_bank_adrs_cx[ui] = d_sprite; | |
911 | - } | |
912 | - */ | |
913 | - for(uint32_t ui = 0x80000; ui < (0x80000 + (vram_size >> 12)); ui++) { | |
914 | - device_bank_adrs_cx[ui] = d_vram; | |
915 | - } | |
916 | - for(uint32_t ui = 0x80100; ui < (0x80100 + (vram_size >> 12)); ui++) { | |
917 | - device_bank_adrs_cx[ui] = d_vram; | |
918 | - } | |
919 | - for(uint32_t ui = 0x81000; ui < 0x81020; ui++) { | |
920 | - device_bank_adrs_cx[ui] = d_sprite; | |
921 | - } | |
922 | - | |
923 | - // ROM CARD | |
924 | - for(uint32_t ui = 0xc0000; ui < 0xc1000; ui++) { | |
925 | - device_bank_adrs_cx[ui] = d_romcard[0]; | |
926 | - } | |
927 | - // ROM CARD2 | |
928 | - for(uint32_t ui = 0xc1000; ui < 0xc2000; ui++) { | |
929 | - device_bank_adrs_cx[ui] = d_romcard[1]; | |
930 | - } | |
931 | - for(uint32_t ui = 0xc2140; ui < 0xc2142; ui++) { | |
932 | - device_bank_adrs_cx[ui] = d_dictionary; | |
933 | - } | |
934 | - for(uint32_t ui = 0xc2200; ui < 0xc2201; ui++) { | |
935 | - device_bank_adrs_cx[ui] = d_pcm; | |
936 | - } | |
937 | - // ROMs | |
938 | - for(uint32_t ui = 0xc2000; ui < 0xc2080; ui++) { | |
939 | - device_bank_adrs_cx[ui] = d_msdos; | |
940 | - } | |
941 | - for(uint32_t ui = 0xc2080; ui < 0xc2100; ui++) { | |
942 | - device_bank_adrs_cx[ui] = d_dictionary; | |
943 | - } | |
944 | - for(uint32_t ui = 0xc2100; ui < 0xc2140; ui++) { | |
945 | - device_bank_adrs_cx[ui] = d_fonts; | |
946 | - } | |
947 | - for(uint32_t ui = 0xc2180; ui < 0xc2200; ui++) { // 20pixs fonts. | |
948 | - device_bank_adrs_cx[ui] = d_fonts; | |
949 | - } | |
950 | - | |
951 | - // SYSTEM CODE ROM | |
952 | - for(uint32_t ui = 0xfffc0; ui < 0x100000; ui++) { | |
953 | - device_bank_adrs_cx[ui] = d_sysrom; | |
954 | - } | |
955 | -} | |
956 | - | |
957 | - | |
958 | -uint32_t TOWNS_MEMORY::read_data8(uint32_t addr) | |
959 | -{ | |
960 | - int wait; | |
961 | - return read_data8w(addr, &wait); | |
962 | -} | |
963 | - | |
964 | -uint32_t TOWNS_MEMORY::read_data16(uint32_t addr) | |
965 | -{ | |
966 | - int wait; | |
967 | - return read_data16w(addr, &wait); | |
968 | -} | |
969 | - | |
970 | -uint32_t TOWNS_MEMORY::read_data32(uint32_t addr) | |
971 | -{ | |
972 | - int wait; | |
973 | - return read_data32w(addr, &wait); | |
974 | -} | |
975 | - | |
976 | -void TOWNS_MEMORY::write_dma_data8(uint32_t addr, uint32_t data) | |
977 | -{ | |
978 | - int wait; | |
979 | - write_data8w(addr & dma_addr_mask, data, &wait); | |
980 | -} | |
981 | - | |
982 | -uint32_t TOWNS_MEMORY::read_dma_data8(uint32_t addr) | |
983 | -{ | |
984 | - int wait; | |
985 | - return read_data8w(addr & dma_addr_mask, &wait); | |
986 | -} | |
987 | -void TOWNS_MEMORY::write_dma_data16(uint32_t addr, uint32_t data) | |
988 | -{ | |
989 | - int wait; | |
990 | - write_data16w(addr & dma_addr_mask, data, &wait); | |
991 | -} | |
992 | - | |
993 | -uint32_t TOWNS_MEMORY::read_dma_data16(uint32_t addr) | |
994 | -{ | |
995 | - int wait; | |
996 | - return read_data16w(addr & dma_addr_mask, &wait); | |
997 | -} | |
998 | - | |
999 | - | |
1000 | 425 | void TOWNS_MEMORY::write_signal(int ch, uint32_t data, uint32_t mask) |
1001 | 426 | { |
1002 | 427 | if(ch == SIG_MEMORY_EXTNMI) { |
@@ -1056,36 +481,33 @@ bool TOWNS_MEMORY::process_state(FILEIO* state_fio, bool loading) | ||
1056 | 481 | //state_fio->StateValue(dma_wrap_reg); |
1057 | 482 | |
1058 | 483 | state_fio->StateArray(ram_page0, sizeof(ram_page0), 1); |
1059 | - state_fio->StateArray(ram_0c0, sizeof(ram_0c0), 1); | |
1060 | - state_fio->StateArray(ram_0c8, sizeof(ram_0c8), 1); | |
1061 | - state_fio->StateArray(ram_0ca, sizeof(ram_0ca), 1); | |
1062 | - state_fio->StateArray(ram_0cb, sizeof(ram_0cb), 1); | |
1063 | - state_fio->StateArray(ram_0cc, sizeof(ram_0cc), 1); | |
1064 | - | |
1065 | - | |
484 | + state_fio->StateArray(ram_pagef, sizeof(ram_pagef), 1); | |
1066 | 485 | if(loading) { |
1067 | 486 | uint32_t length_tmp = state_fio->FgetUint32_LE(); |
1068 | - if(extram != NULL) { | |
1069 | - free(extram); | |
1070 | - extram = NULL; | |
487 | + if(extra_ram != NULL) { | |
488 | + free(extra_ram); | |
489 | + extra_ram = NULL; | |
1071 | 490 | } |
1072 | 491 | length_tmp = length_tmp & 0x3ff00000; |
1073 | - extram_size = length_tmp; | |
492 | + extra_ram_size = length_tmp; | |
1074 | 493 | if(length_tmp > 0) { |
1075 | - extram = (uint8_t*)malloc(length_tmp); | |
494 | + extra_ram = (uint8_t*)malloc(length_tmp); | |
1076 | 495 | } |
1077 | - if(extram == NULL) { | |
1078 | - extram_size = 0; | |
496 | + unset_memory_rw(0x00100000, 0x3fffffff); | |
497 | + if(extra_ram == NULL) { | |
498 | + extra_ram_size = 0; | |
1079 | 499 | return false; |
1080 | 500 | } else { |
1081 | - state_fio->Fread(extram, extram_size, 1); | |
501 | + state_fio->Fread(extra_ram, extra_ram_size, 1); | |
502 | + set_memory_rw(0x00100000, (extra_ram_size + 0x00100000) - 1, extra_ram); | |
1082 | 503 | } |
504 | + | |
1083 | 505 | } else { |
1084 | - if(extram == NULL) { | |
506 | + if(extra_ram == NULL) { | |
1085 | 507 | state_fio->FputUint32_LE(0); |
1086 | 508 | } else { |
1087 | - state_fio->FputUint32_LE(extram_size & 0x3ff00000); | |
1088 | - state_fio->Fwrite(extram, extram_size, 1); | |
509 | + state_fio->FputUint32_LE(extra_ram_size & 0x3ff00000); | |
510 | + state_fio->Fwrite(extra_ram, extra_ram_size, 1); | |
1089 | 511 | } |
1090 | 512 | } |
1091 | 513 |
@@ -13,10 +13,11 @@ | ||
13 | 13 | //#include "../vm.h" |
14 | 14 | //#include "../../emu.h" |
15 | 15 | #include "../device.h" |
16 | +#include "../memory.h" | |
16 | 17 | |
17 | 18 | #define SIG_FMTOWNS_MACHINE_ID 1 |
18 | 19 | |
19 | -class I386; | |
20 | +class I80386; | |
20 | 21 | // Bank size = 1GB / 1MB. |
21 | 22 | // Page 0 (0000:00000 - 0000:fffff) is another routine. |
22 | 23 | #define TOWNS_BANK_SIZE 1024 |
@@ -97,21 +98,10 @@ protected: | ||
97 | 98 | |
98 | 99 | // RAM |
99 | 100 | uint8_t ram_page0[0xc0000]; // 0x00000000 - 0x000bffff : RAM |
100 | - //uint8_t vram_plane[0x8000 * 8]; // 0x000c0000 - 0x000c7fff : Plane Accessed VRAM | |
101 | - //uint8_t text_ram[0x1000]; // 0x000c8000 - 0x000c8fff : Character VRAM | |
102 | - //uint8_t vram_reserved[0x1000]; // 0x000c9000 - 0x000c9fff : Resetved | |
103 | - uint8_t ram_0c0[0x8000]; // 0x000ca000 - 0x000cafff : ANKCG1 / IO / RAM | |
104 | - uint8_t ram_0c8[0x2000]; // 0x000ca000 - 0x000cafff : ANKCG1 / IO / RAM | |
105 | - | |
106 | - //uint8_t sprite_ram[0x1000]; // 0x000ca000 - 0x000cafff : Sprite RAM | |
107 | - //uint8_t ank_cg1[0x800]; // 0x000ca000 - 0x000ca7ff : ANK CG ROM (FONTROM[0x3d000 - 0x3d7ff]) | |
108 | - //uint8_t ank_cg2[0x1000]; // 0x000cb000 - 0x000cbfff : ANK CG ROM (FONTROM[0x3d800 - 0x3e7ff]) | |
109 | - uint8_t ram_0ca[0x1000]; // 0x000ca000 - 0x000cafff : ANKCG1 / IO / RAM | |
110 | - uint8_t ram_0cb[0x1000]; // 0x000cb000 - 0x000cbfff : ANKCG2 / RAM | |
111 | - uint8_t ram_0cc[0x4000]; // 0x000cc000 - 0x000cffff : MMIO / RAM | |
101 | + uint8_t ram_pagef[0x08000]; // 0x000f0000 - 0x000f7fff : RAM | |
112 | 102 | |
113 | - uint8_t *extram; // 0x00100000 - (0x3fffffff) : Size is defined by extram_size; | |
114 | - uint32_t extram_size; | |
103 | + uint8_t *extra_ram; // 0x00100000 - (0x3fffffff) : Size is defined by extram_size; | |
104 | + uint32_t extra_ram_size; | |
115 | 105 | |
116 | 106 | uint32_t vram_wait_val; |
117 | 107 | uint32_t mem_wait_val; |
@@ -138,7 +128,7 @@ protected: | ||
138 | 128 | virtual void write_mmio(uint32_t addr, uint32_t data, int *wait, bool *hit); |
139 | 129 | |
140 | 130 | public: |
141 | - TOWNS_MEMORY(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu) { | |
131 | + TOWNS_MEMORY(VM_TEMPLATE* parent_vm, EMU* parent_emu) : MEMORY(parent_vm, parent_emu) { | |
142 | 132 | set_device_name(_T("FMTOWNS_MEMORY")); |
143 | 133 | d_cpu = NULL; |
144 | 134 | d_vram = NULL; |
@@ -171,7 +161,7 @@ public: | ||
171 | 161 | // cpu_id = 0x02; // 80486SX/DX. |
172 | 162 | // cpu_id = 0x03; // 80386SX. |
173 | 163 | cpu_id = 0x01; // 80386DX. |
174 | - | |
164 | + extra_ram = NULL; | |
175 | 165 | } |
176 | 166 | ~TOWNS_MEMORY() {} |
177 | 167 |