Common Source Code Project for Qt (a.k.a for FM-7).
| Revision | f318d690c145021d153cf03dc7bc01329ceb379b (tree) |
|---|---|
| Zeit | 2019-02-17 23:34:18 |
| Autor | K.Ohta <whatisthis.sowhat@gmai...> |
| Commiter | K.Ohta |
[VM][PCENGINE][CDROM] Fix READ COMMAND $1801().Not reply any signals.
source/src/vm/pcengine/pce.cpp (diff)| @@ -2053,65 +2053,19 @@ uint8_t PCE::cdrom_read(uint16_t addr) | ||
| 2053 | 2053 | data |= d_scsi_host->read_signal(SIG_SCSI_CD ) ? 0x10 : 0; |
| 2054 | 2054 | data |= d_scsi_host->read_signal(SIG_SCSI_IO ) ? 0x08 : 0; |
| 2055 | 2055 | cdrom_regs[0x00] = data; |
| 2056 | - if(false){ | |
| 2057 | - // Import from Ootake v2.83 20181211 K.O | |
| 2058 | - if(((data & 0x10) != 0) && | |
| 2059 | - ((data & 0x20) == 0) && | |
| 2060 | - ((data & 0x08) == 0)){ // Command phase | |
| 2061 | - if((data & 0x80) != 0) { // Busy | |
| 2062 | - // data = (data & ~0x40) | 0x08; // (data & ~REQ) | IO | |
| 2063 | - } else { | |
| 2064 | - //data = data & ~0x40; // (data & ~REQ) | |
| 2065 | - } | |
| 2066 | - } else if((data & 0x80) != 0) { // BUSY | |
| 2067 | - data = (data & ~0x40) | 0x10 | 0x80; // (data & ~REQ) | BUSY | CD | |
| 2068 | - } /*else if(_CheckCountAfterRead == 0) && (Status phase) && (cmd == read6)){ | |
| 2069 | - data = data & ~0x40; | |
| 2070 | - } else */ /* if(_bCDReqWait) { | |
| 2071 | - _bCDReqWait = false; | |
| 2072 | - if(data boundary) { | |
| 2073 | - data = data & ~0x40; | |
| 2074 | - } | |
| 2075 | - }*/ | |
| 2076 | - } | |
| 2077 | 2056 | break; |
| 2078 | 2057 | |
| 2079 | 2058 | case 0x01: /* CDC command / status / data */ |
| 2080 | 2059 | { |
| 2060 | + // 20190217 K.O: READ_1801() seems to not reply any signal(s). | |
| 2081 | 2061 | bool read6_data_in = false; |
| 2082 | - if(d_scsi_cdrom->get_cur_command() == SCSI_CMD_READ6 && | |
| 2083 | - d_scsi_host->read_signal(SIG_SCSI_BSY) != 0 && | |
| 2084 | - d_scsi_host->read_signal(SIG_SCSI_REQ) != 0 && | |
| 2085 | - d_scsi_host->read_signal(SIG_SCSI_CD ) == 0 && | |
| 2086 | - d_scsi_host->read_signal(SIG_SCSI_MSG) == 0 && | |
| 2087 | - d_scsi_host->read_signal(SIG_SCSI_IO ) != 0) { | |
| 2088 | - // read6 command, data in phase | |
| 2089 | - read6_data_in = true; | |
| 2090 | - } | |
| 2091 | 2062 | data = read_cdrom_data(); |
| 2092 | - if(read6_data_in) { | |
| 2093 | - // set ack automatically and immediately for correct transfer speed | |
| 2094 | - set_ack(); | |
| 2095 | - // XXX: Hack to wait until next REQ signal is raised | |
| 2096 | - // because PCE does not check REQ signal before reads next byte | |
| 2097 | - d_cpu->write_signal(SIG_CPU_BUSREQ, 1, 1); | |
| 2098 | - check_read6_status_flag = false; | |
| 2099 | - } else if(!(check_read6_status_flag) && | |
| 2100 | - (d_scsi_cdrom->get_cur_command() == SCSI_CMD_READ6) && | |
| 2101 | - (d_scsi_host->read_signal(SIG_SCSI_BSY) == 0) && | |
| 2102 | - (d_scsi_host->read_signal(SIG_SCSI_REQ) == 0) && | |
| 2103 | - (d_scsi_host->read_signal(SIG_SCSI_CD ) == 0) && | |
| 2104 | - (d_scsi_host->read_signal(SIG_SCSI_MSG) == 0) && | |
| 2105 | - (d_scsi_host->read_signal(SIG_SCSI_IO ) == 0)) { // BUS FREE | |
| 2106 | - check_read6_status_flag = true; | |
| 2107 | - clear_ack(); | |
| 2108 | - set_cdrom_irq_line(PCE_CD_IRQ_TRANSFER_DONE, ASSERT_LINE); | |
| 2109 | - d_adpcm->write_signal(SIG_ADPCM_DMA_RELEASED, 0xff, 0xff); | |
| 2110 | - } | |
| 2063 | + check_read6_status_flag = true; | |
| 2111 | 2064 | } |
| 2112 | 2065 | break; |
| 2113 | 2066 | case 0x08: /* ADPCM address (LSB) / CD data */ |
| 2114 | 2067 | { |
| 2068 | + // READ_1808() | |
| 2115 | 2069 | bool read6_data_in = false; |
| 2116 | 2070 | if(d_scsi_cdrom->get_cur_command() == SCSI_CMD_READ6 && |
| 2117 | 2071 | d_scsi_host->read_signal(SIG_SCSI_BSY) != 0 && |
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