Common Source Code Project for Qt (a.k.a for FM-7).
Revision | a194c79c280f6b52d7f9676e9b1190b1c5fac154 (tree) |
---|---|
Zeit | 2021-01-31 21:48:17 |
Autor | K.Ohta <whatisthis.sowhat@gmai...> |
Commiter | K.Ohta |
[VM][PC8801][PC9801] Merge Upstream 2020-12-16 and 2020-12-18 *excepts SCSI_CDROM*.
@@ -1,3 +1,16 @@ | ||
1 | +12/19/2020 | |
2 | + | |
3 | +[VM/SCSI_CDROM] fix pre-gap of first track when it is audio track | |
4 | + | |
5 | + | |
6 | +12/18/2020 | |
7 | + | |
8 | +[VM/SCSI_CDROM] improve routine to get start/end frame of CD-DA playing | |
9 | + | |
10 | +[PC8801/PC88] support 8inch DMA-type floppy drives for PC-8001mkII/SR | |
11 | +[PC9801/DISPLAY] improve EGC (thanks Mr.Ryuji Okamoto) | |
12 | + | |
13 | + | |
1 | 14 | 12/16/2020 |
2 | 15 | |
3 | 16 | [PC8801/DISKIO] improve to read/write files in initial current directory |
@@ -1,5 +1,5 @@ | ||
1 | 1 | retro pc emulator common source code |
2 | - 12/15/2020 | |
2 | + 12/18/2020 | |
3 | 3 | |
4 | 4 | --- What's this ? |
5 | 5 |
@@ -348,6 +348,7 @@ See also COPYING.txt for more details about the license. | ||
348 | 348 | MESS PC-8801 driver |
349 | 349 | - vm/pc9801/display.* |
350 | 350 | Neko Project 2 by Mr.Yui |
351 | + Improved for EGC by Mr.Ryuji Okamoto (qemu/9821改造版) | |
351 | 352 | - vm/pcengine/pce.* |
352 | 353 | Ootake (joypad) |
353 | 354 | xpce (psg) |
@@ -178,7 +178,7 @@ BEGIN | ||
178 | 178 | POPUP "Display" |
179 | 179 | BEGIN |
180 | 180 | MENUITEM "Scanline", ID_VM_MONITOR_SCANLINE |
181 | - MENUITEM "Real Palettes", ID_VM_DIPSWITCH5 | |
181 | + MENUITEM "Ignore Palette Changed Outside VBLANK", ID_VM_DIPSWITCH5 | |
182 | 182 | END |
183 | 183 | POPUP "Printer" |
184 | 184 | BEGIN |
@@ -128,7 +128,7 @@ BEGIN | ||
128 | 128 | MENUITEM SEPARATOR |
129 | 129 | MENUITEM "Exit", ID_EXIT |
130 | 130 | END |
131 | - POPUP "FD1" | |
131 | + POPUP "5inch-FD1" | |
132 | 132 | BEGIN |
133 | 133 | MENUITEM "Insert", ID_OPEN_FD1 |
134 | 134 | MENUITEM "Eject", ID_CLOSE_FD1 |
@@ -152,6 +152,30 @@ BEGIN | ||
152 | 152 | MENUITEM SEPARATOR |
153 | 153 | MENUITEM "Recent", ID_RECENT_FD2 |
154 | 154 | END |
155 | + POPUP "8inch-FD1" | |
156 | + BEGIN | |
157 | + MENUITEM "Insert", ID_OPEN_FD3 | |
158 | + MENUITEM "Eject", ID_CLOSE_FD3 | |
159 | + MENUITEM "Insert Blank 8inch-2D Disk", ID_OPEN_BLANK_2HD_FD3 | |
160 | + MENUITEM SEPARATOR | |
161 | + MENUITEM "Write Protected", ID_WRITE_PROTECT_FD3 | |
162 | + MENUITEM "Correct Timing", ID_CORRECT_TIMING_FD3 | |
163 | + MENUITEM "Ignore CRC Errors", ID_IGNORE_CRC_FD3 | |
164 | + MENUITEM SEPARATOR | |
165 | + MENUITEM "Recent", ID_RECENT_FD3 | |
166 | + END | |
167 | + POPUP "FD2" | |
168 | + BEGIN | |
169 | + MENUITEM "Insert", ID_OPEN_FD4 | |
170 | + MENUITEM "Eject", ID_CLOSE_FD4 | |
171 | + MENUITEM "Insert Blank 8inch-2D Disk", ID_OPEN_BLANK_2HD_FD4 | |
172 | + MENUITEM SEPARATOR | |
173 | + MENUITEM "Write Protected", ID_WRITE_PROTECT_FD4 | |
174 | + MENUITEM "Correct Timing", ID_CORRECT_TIMING_FD4 | |
175 | + MENUITEM "Ignore CRC Errors", ID_IGNORE_CRC_FD4 | |
176 | + MENUITEM SEPARATOR | |
177 | + MENUITEM "Recent", ID_RECENT_FD4 | |
178 | + END | |
155 | 179 | POPUP "CMT" |
156 | 180 | BEGIN |
157 | 181 | MENUITEM "Play", ID_PLAY_TAPE1 |
@@ -170,6 +194,7 @@ BEGIN | ||
170 | 194 | POPUP "Floppy Drive" |
171 | 195 | BEGIN |
172 | 196 | MENUITEM "5inch FD", ID_VM_DIPSWITCH6 |
197 | + MENUITEM "8inch FD", ID_VM_DIPSWITCH7 | |
173 | 198 | END |
174 | 199 | POPUP "Sound" |
175 | 200 | BEGIN |
@@ -186,7 +211,7 @@ BEGIN | ||
186 | 211 | POPUP "Display" |
187 | 212 | BEGIN |
188 | 213 | MENUITEM "Scanline", ID_VM_MONITOR_SCANLINE |
189 | - MENUITEM "Real Palettes", ID_VM_DIPSWITCH5 | |
214 | + MENUITEM "Ignore Palette Changed Outside VBLANK", ID_VM_DIPSWITCH5 | |
190 | 215 | END |
191 | 216 | POPUP "Printer" |
192 | 217 | BEGIN |
@@ -128,7 +128,7 @@ BEGIN | ||
128 | 128 | MENUITEM SEPARATOR |
129 | 129 | MENUITEM "Exit", ID_EXIT |
130 | 130 | END |
131 | - POPUP "FD1" | |
131 | + POPUP "5inch-FD1" | |
132 | 132 | BEGIN |
133 | 133 | MENUITEM "Insert", ID_OPEN_FD1 |
134 | 134 | MENUITEM "Eject", ID_CLOSE_FD1 |
@@ -152,6 +152,30 @@ BEGIN | ||
152 | 152 | MENUITEM SEPARATOR |
153 | 153 | MENUITEM "Recent", ID_RECENT_FD2 |
154 | 154 | END |
155 | + POPUP "8inch-FD1" | |
156 | + BEGIN | |
157 | + MENUITEM "Insert", ID_OPEN_FD3 | |
158 | + MENUITEM "Eject", ID_CLOSE_FD3 | |
159 | + MENUITEM "Insert Blank 8inch-2D Disk", ID_OPEN_BLANK_2HD_FD3 | |
160 | + MENUITEM SEPARATOR | |
161 | + MENUITEM "Write Protected", ID_WRITE_PROTECT_FD3 | |
162 | + MENUITEM "Correct Timing", ID_CORRECT_TIMING_FD3 | |
163 | + MENUITEM "Ignore CRC Errors", ID_IGNORE_CRC_FD3 | |
164 | + MENUITEM SEPARATOR | |
165 | + MENUITEM "Recent", ID_RECENT_FD3 | |
166 | + END | |
167 | + POPUP "FD2" | |
168 | + BEGIN | |
169 | + MENUITEM "Insert", ID_OPEN_FD4 | |
170 | + MENUITEM "Eject", ID_CLOSE_FD4 | |
171 | + MENUITEM "Insert Blank 8inch-2D Disk", ID_OPEN_BLANK_2HD_FD4 | |
172 | + MENUITEM SEPARATOR | |
173 | + MENUITEM "Write Protected", ID_WRITE_PROTECT_FD4 | |
174 | + MENUITEM "Correct Timing", ID_CORRECT_TIMING_FD4 | |
175 | + MENUITEM "Ignore CRC Errors", ID_IGNORE_CRC_FD4 | |
176 | + MENUITEM SEPARATOR | |
177 | + MENUITEM "Recent", ID_RECENT_FD4 | |
178 | + END | |
155 | 179 | POPUP "CMT" |
156 | 180 | BEGIN |
157 | 181 | MENUITEM "Play", ID_PLAY_TAPE1 |
@@ -175,6 +199,7 @@ BEGIN | ||
175 | 199 | POPUP "Floppy Drive" |
176 | 200 | BEGIN |
177 | 201 | MENUITEM "5inch FD", ID_VM_DIPSWITCH6 |
202 | + MENUITEM "8inch FD", ID_VM_DIPSWITCH7 | |
178 | 203 | END |
179 | 204 | POPUP "Sound" |
180 | 205 | BEGIN |
@@ -191,7 +216,7 @@ BEGIN | ||
191 | 216 | POPUP "Display" |
192 | 217 | BEGIN |
193 | 218 | MENUITEM "Scanline", ID_VM_MONITOR_SCANLINE |
194 | - MENUITEM "Real Palettes", ID_VM_DIPSWITCH5 | |
219 | + MENUITEM "Ignore Palette Changed Outside VBLANK", ID_VM_DIPSWITCH5 | |
195 | 220 | END |
196 | 221 | POPUP "Printer" |
197 | 222 | BEGIN |
@@ -212,7 +212,7 @@ BEGIN | ||
212 | 212 | POPUP "Display" |
213 | 213 | BEGIN |
214 | 214 | MENUITEM "Scanline", ID_VM_MONITOR_SCANLINE |
215 | - MENUITEM "Real Palettes", ID_VM_DIPSWITCH5 | |
215 | + MENUITEM "Ignore Palette Changed Outside VBLANK", ID_VM_DIPSWITCH5 | |
216 | 216 | END |
217 | 217 | POPUP "Printer" |
218 | 218 | BEGIN |
@@ -248,7 +248,7 @@ BEGIN | ||
248 | 248 | MENUITEM SEPARATOR |
249 | 249 | MENUITEM "Set Scanline Automatically", ID_VM_MONITOR_SCANLINE_AUTO |
250 | 250 | MENUITEM "Scanline", ID_VM_MONITOR_SCANLINE |
251 | - MENUITEM "Real Palettes", ID_VM_DIPSWITCH5 | |
251 | + MENUITEM "Ignore Palette Changed Outside VBLANK", ID_VM_DIPSWITCH5 | |
252 | 252 | END |
253 | 253 | POPUP "Printer" |
254 | 254 | BEGIN |
@@ -212,7 +212,7 @@ BEGIN | ||
212 | 212 | POPUP "Display" |
213 | 213 | BEGIN |
214 | 214 | MENUITEM "Scanline", ID_VM_MONITOR_SCANLINE |
215 | - MENUITEM "Real Palettes", ID_VM_DIPSWITCH5 | |
215 | + MENUITEM "Ignore Palette Changed Outside VBLANK", ID_VM_DIPSWITCH5 | |
216 | 216 | END |
217 | 217 | POPUP "Printer" |
218 | 218 | BEGIN |
@@ -227,6 +227,7 @@ BEGIN | ||
227 | 227 | MENUITEM SEPARATOR |
228 | 228 | MENUITEM "Set Scanline Automatically", ID_VM_MONITOR_SCANLINE_AUTO |
229 | 229 | MENUITEM "Scanline", ID_VM_MONITOR_SCANLINE |
230 | + MENUITEM "Ignore Palette Changed Outside VBLANK", ID_VM_DIPSWITCH5 | |
230 | 231 | END |
231 | 232 | POPUP "Printer" |
232 | 233 | BEGIN |
@@ -1,6 +1,6 @@ | ||
1 | 1 | message("* vm/common_vm") |
2 | 2 | |
3 | -SET(THIS_LIB_VERSION 3.5.1) | |
3 | +SET(THIS_LIB_VERSION 3.5.2) | |
4 | 4 | |
5 | 5 | #include(cotire) |
6 | 6 | set(s_vm_common_vm_srcs |
@@ -37,7 +37,7 @@ public: | ||
37 | 37 | { |
38 | 38 | set_device_name(_T("M88 DiskDrv")); |
39 | 39 | } |
40 | - ~DiskIO(); | |
40 | + ~DiskIO() {} | |
41 | 41 | |
42 | 42 | // common functions |
43 | 43 | void initialize(); |
@@ -299,6 +299,7 @@ void PC88::initialize() | ||
299 | 299 | memset(n88exrom, 0xff, sizeof(n88exrom)); |
300 | 300 | memset(n80rom, 0xff, sizeof(n80rom)); |
301 | 301 | memset(n88erom, 0xff, sizeof(n88erom)); |
302 | + n88erom_loaded = 0; | |
302 | 303 | #ifdef SUPPORT_PC88_DICTIONARY |
303 | 304 | memset(dicrom, 0xff, sizeof(dicrom)); |
304 | 305 | #endif |
@@ -411,6 +412,7 @@ void PC88::initialize() | ||
411 | 412 | fio->Fread(n88erom[i], 0x2000, 1); |
412 | 413 | fio->Fclose(); |
413 | 414 | if(length < 0x2000) memset(&n88erom[i][length], 0xff, 0x2000 - length); |
415 | + n88erom_loaded |= (1 << i); | |
414 | 416 | } |
415 | 417 | } |
416 | 418 | #ifdef SUPPORT_M88_DISKDRV |
@@ -605,7 +607,7 @@ void PC88::reset() | ||
605 | 607 | #else |
606 | 608 | #ifdef SUPPORT_M88_DISKDRV |
607 | 609 | if(d_diskio != NULL) { |
608 | - if(config.boot_mode == MODE_PC88_N) { | |
610 | + if(config.boot_mode == MODE_PC88_N && (n88erom_loaded & 0x100)) { | |
609 | 611 | // diskdv80/n80patch.cpp |
610 | 612 | static const uint8_t code[4] = { 0xc3, 0x07, 0x60, 0x55 }; |
611 | 613 | size_t length = *((short*)(&n88erom[8][5])); |
@@ -1269,14 +1271,14 @@ void PC88::write_io8(uint32_t addr, uint32_t data) | ||
1269 | 1271 | #if defined(PC8001_VARIANT) |
1270 | 1272 | #if defined(_PC8001SR) |
1271 | 1273 | case 0x71: |
1272 | - if((mod & 1) && Port33_N80SR) { | |
1274 | + if((mod & 0x01) && Port33_N80SR) { | |
1273 | 1275 | update_n80_read(); |
1274 | 1276 | } |
1275 | 1277 | break; |
1276 | 1278 | #endif |
1277 | 1279 | #else |
1278 | 1280 | case 0x71: |
1279 | - if(mod) { | |
1281 | + if(mod & 0x03) { | |
1280 | 1282 | update_low_read(); |
1281 | 1283 | } |
1282 | 1284 | break; |
@@ -2244,7 +2246,7 @@ void PC88::update_low_read() | ||
2244 | 2246 | SET_BANK_R(0x0000, 0x5fff, n88rom); |
2245 | 2247 | if(Port71_EROM & 1) { |
2246 | 2248 | #ifdef SUPPORT_M88_DISKDRV |
2247 | - if(d_diskio != NULL && Port71_EROM == 0xfd) { | |
2249 | + if(d_diskio != NULL && (n88erom_loaded & 2) && Port71_EROM == 0xfd) { | |
2248 | 2250 | SET_BANK_R(0x6000, 0x7fff, n88erom[1]); |
2249 | 2251 | } else |
2250 | 2252 | #endif |
@@ -187,6 +187,7 @@ private: | ||
187 | 187 | uint8_t n88exrom[0x8000]; |
188 | 188 | uint8_t n80rom[0x8000]; |
189 | 189 | uint8_t n88erom[9][0x2000]; |
190 | + int n88erom_loaded; | |
190 | 191 | #endif |
191 | 192 | //#ifdef SUPPORT_PC88_KANJI1 |
192 | 193 | uint8_t kanji1[0x20000]; |
@@ -77,13 +77,13 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu) | ||
77 | 77 | if(config.boot_mode != MODE_PC80_N) { |
78 | 78 | config.boot_mode = MODE_PC80_N; |
79 | 79 | } |
80 | + // 8inch floppy drives are not supported | |
81 | + config.dipswitch &= ~DIPSWITCH_FDD_8INCH; | |
80 | 82 | #elif defined(_PC8001MK2) |
81 | 83 | if(config.boot_mode == MODE_PC80_V2) { |
82 | 84 | config.boot_mode = MODE_PC80_V1; |
83 | 85 | } |
84 | 86 | #endif |
85 | - // 8inch floppy drives are not supported | |
86 | - config.dipswitch &= ~DIPSWITCH_FDD_8INCH; | |
87 | 87 | #else |
88 | 88 | #if !defined(PC8801SR_VARIANT) |
89 | 89 | if(config.boot_mode == MODE_PC88_V1H || config.boot_mode == MODE_PC88_V2 || config.boot_mode == MODE_PC88_V2CD) { |
@@ -98,16 +98,19 @@ | ||
98 | 98 | #define SUPPORT_PC88_OPN1 |
99 | 99 | #define SUPPORT_PC88_OPN2 |
100 | 100 | #define PC88_EXRAM_BANKS 1 |
101 | + #define SUPPORT_PC88_FDD_8INCH | |
101 | 102 | #define SUPPORT_M88_DISKDRV |
102 | 103 | #elif defined(_PC8001MK2) |
103 | 104 | #define SUPPORT_PC88_KANJI1 |
104 | 105 | // #define SUPPORT_PC88_KANJI2 |
105 | 106 | #define SUPPORT_PC88_OPN2 |
106 | 107 | #define PC88_EXRAM_BANKS 1 |
108 | + #define SUPPORT_PC88_FDD_8INCH | |
107 | 109 | #define SUPPORT_M88_DISKDRV |
108 | 110 | #elif defined(_PC8001) |
109 | 111 | // #define SUPPORT_PC88_KANJI1 |
110 | 112 | // #define SUPPORT_PC88_KANJI2 |
113 | +// #define SUPPORT_PC88_FDD_8INCH | |
111 | 114 | // #define SUPPORT_M88_DISKDRV |
112 | 115 | #endif |
113 | 116 | #define SUPPORT_PC88_GSX8800 |
@@ -141,9 +141,9 @@ void __FASTCALL DISPLAY::egc_sftb_upn_sub(uint32_t ext) | ||
141 | 141 | // egc_vram_src.b[i][1] = tmp[i]; |
142 | 142 | // } |
143 | 143 | // } |
144 | - egc_vram_src.b[0][ext] = egc_outptr[0]; | |
145 | - egc_vram_src.b[1][ext] = egc_outptr[4]; | |
146 | - egc_vram_src.b[2][ext] = egc_outptr[8]; | |
144 | + egc_vram_src.b[0][ext] = egc_outptr[ 0]; | |
145 | + egc_vram_src.b[1][ext] = egc_outptr[ 4]; | |
146 | + egc_vram_src.b[2][ext] = egc_outptr[ 8]; | |
147 | 147 | egc_vram_src.b[3][ext] = egc_outptr[12]; |
148 | 148 | egc_outptr++; |
149 | 149 | } |
@@ -189,13 +189,18 @@ void __FASTCALL DISPLAY::egc_sftb_dnn_sub(uint32_t ext) | ||
189 | 189 | // egc_vram_src.b[i][1] = tmp[i]; |
190 | 190 | // } |
191 | 191 | // } |
192 | - egc_vram_src.b[0][ext] = egc_outptr[0]; | |
193 | - egc_vram_src.b[1][ext] = egc_outptr[4]; | |
194 | - egc_vram_src.b[2][ext] = egc_outptr[8]; | |
192 | + egc_vram_src.b[0][ext] = egc_outptr[ 0]; | |
193 | + egc_vram_src.b[1][ext] = egc_outptr[ 4]; | |
194 | + egc_vram_src.b[2][ext] = egc_outptr[ 8]; | |
195 | 195 | egc_vram_src.b[3][ext] = egc_outptr[12]; |
196 | 196 | egc_outptr--; |
197 | 197 | } |
198 | 198 | |
199 | +// ****---4 -------8 -------- | |
200 | +// ******-- -4------ --8----- -- | |
201 | +// 1st -> data[0] >> (dst - src) | |
202 | +// 2nd -> (data[0] << (8 - (dst - src))) | (data[1] >> (dst - src)) | |
203 | + | |
199 | 204 | void __FASTCALL DISPLAY::egc_sftb_upr_sub(uint32_t ext) |
200 | 205 | { |
201 | 206 | if(egc_dstbit >= 8) { |
@@ -227,9 +232,9 @@ void __FASTCALL DISPLAY::egc_sftb_upr_sub(uint32_t ext) | ||
227 | 232 | egc_vram_src.b[i][ext] = tmp[i]; |
228 | 233 | } |
229 | 234 | #else |
230 | - egc_vram_src.b[0][ext] = (egc_outptr[0] >> egc_sft8bitr); | |
231 | - egc_vram_src.b[1][ext] = (egc_outptr[4] >> egc_sft8bitr); | |
232 | - egc_vram_src.b[2][ext] = (egc_outptr[8] >> egc_sft8bitr); | |
235 | + egc_vram_src.b[0][ext] = (egc_outptr[ 0] >> egc_sft8bitr); | |
236 | + egc_vram_src.b[1][ext] = (egc_outptr[ 4] >> egc_sft8bitr); | |
237 | + egc_vram_src.b[2][ext] = (egc_outptr[ 8] >> egc_sft8bitr); | |
233 | 238 | egc_vram_src.b[3][ext] = (egc_outptr[12] >> egc_sft8bitr); |
234 | 239 | #endif |
235 | 240 | } else { |
@@ -262,15 +267,20 @@ void __FASTCALL DISPLAY::egc_sftb_upr_sub(uint32_t ext) | ||
262 | 267 | egc_vram_src.b[i][ext] = tmp2[i]; |
263 | 268 | } |
264 | 269 | #else |
265 | - egc_vram_src.b[0][ext] = (egc_outptr[0] << egc_sft8bitl) | (egc_outptr[1] >> egc_sft8bitr); | |
266 | - egc_vram_src.b[1][ext] = (egc_outptr[4] << egc_sft8bitl) | (egc_outptr[5] >> egc_sft8bitr); | |
267 | - egc_vram_src.b[2][ext] = (egc_outptr[8] << egc_sft8bitl) | (egc_outptr[9] >> egc_sft8bitr); | |
270 | + egc_vram_src.b[0][ext] = (egc_outptr[ 0] << egc_sft8bitl) | (egc_outptr[ 1] >> egc_sft8bitr); | |
271 | + egc_vram_src.b[1][ext] = (egc_outptr[ 4] << egc_sft8bitl) | (egc_outptr[ 5] >> egc_sft8bitr); | |
272 | + egc_vram_src.b[2][ext] = (egc_outptr[ 8] << egc_sft8bitl) | (egc_outptr[ 9] >> egc_sft8bitr); | |
268 | 273 | egc_vram_src.b[3][ext] = (egc_outptr[12] << egc_sft8bitl) | (egc_outptr[13] >> egc_sft8bitr); |
269 | 274 | #endif |
270 | 275 | egc_outptr++; |
271 | 276 | } |
272 | 277 | } |
273 | 278 | |
279 | +// -------- 8------- 6-----** | |
280 | +// --- -----8-- -----6-- ---***** | |
281 | +// 1st -> data[0] << (dst - src) | |
282 | +// 2nd -> (data[0] >> (8 - (dst - src))) | (data[-1] << (dst - src)) | |
283 | + | |
274 | 284 | void __FASTCALL DISPLAY::egc_sftb_dnr_sub(uint32_t ext) |
275 | 285 | { |
276 | 286 | if(egc_dstbit >= 8) { |
@@ -302,9 +312,9 @@ void __FASTCALL DISPLAY::egc_sftb_dnr_sub(uint32_t ext) | ||
302 | 312 | egc_vram_src.b[i][ext] = tmp[i]; |
303 | 313 | } |
304 | 314 | #else |
305 | - egc_vram_src.b[0][ext] = (egc_outptr[0] << egc_sft8bitr); | |
306 | - egc_vram_src.b[1][ext] = (egc_outptr[4] << egc_sft8bitr); | |
307 | - egc_vram_src.b[2][ext] = (egc_outptr[8] << egc_sft8bitr); | |
315 | + egc_vram_src.b[0][ext] = (egc_outptr[ 0] << egc_sft8bitr); | |
316 | + egc_vram_src.b[1][ext] = (egc_outptr[ 4] << egc_sft8bitr); | |
317 | + egc_vram_src.b[2][ext] = (egc_outptr[ 8] << egc_sft8bitr); | |
308 | 318 | egc_vram_src.b[3][ext] = (egc_outptr[12] << egc_sft8bitr); |
309 | 319 | #endif |
310 | 320 | } else { |
@@ -337,15 +347,20 @@ void __FASTCALL DISPLAY::egc_sftb_dnr_sub(uint32_t ext) | ||
337 | 347 | egc_vram_src.b[i][ext] = tmp2[i]; |
338 | 348 | } |
339 | 349 | #else |
340 | - egc_vram_src.b[0][ext] = (egc_outptr[1] >> egc_sft8bitl) | (egc_outptr[0] << egc_sft8bitr); | |
341 | - egc_vram_src.b[1][ext] = (egc_outptr[5] >> egc_sft8bitl) | (egc_outptr[4] << egc_sft8bitr); | |
342 | - egc_vram_src.b[2][ext] = (egc_outptr[9] >> egc_sft8bitl) | (egc_outptr[8] << egc_sft8bitr); | |
350 | + egc_vram_src.b[0][ext] = (egc_outptr[ 1] >> egc_sft8bitl) | (egc_outptr[ 0] << egc_sft8bitr); | |
351 | + egc_vram_src.b[1][ext] = (egc_outptr[ 5] >> egc_sft8bitl) | (egc_outptr[ 4] << egc_sft8bitr); | |
352 | + egc_vram_src.b[2][ext] = (egc_outptr[ 9] >> egc_sft8bitl) | (egc_outptr[ 8] << egc_sft8bitr); | |
343 | 353 | egc_vram_src.b[3][ext] = (egc_outptr[13] >> egc_sft8bitl) | (egc_outptr[12] << egc_sft8bitr); |
344 | 354 | #endif |
345 | 355 | // egc_outptr--; |
346 | 356 | } |
347 | 357 | } |
348 | 358 | |
359 | +// ****---4 -------8 -------- | |
360 | +// **---4-- -----8-- ------ | |
361 | +// 1st -> (data[0] << (src - dst)) | (data[1] >> (8 - (src - dst)) | |
362 | +// 2nd -> (data[0] << (src - dst)) | (data[1] >> (8 - (src - dst)) | |
363 | + | |
349 | 364 | void __FASTCALL DISPLAY::egc_sftb_upl_sub(uint32_t ext) |
350 | 365 | { |
351 | 366 | if(egc_dstbit >= 8) { |
@@ -394,14 +409,19 @@ __DECL_VECTORIZED_LOOP | ||
394 | 409 | egc_vram_src.b[i][ext] = tmp2[i]; |
395 | 410 | } |
396 | 411 | #else |
397 | - egc_vram_src.b[0][ext] = (egc_outptr[0] << egc_sft8bitl) | (egc_outptr[1] >> egc_sft8bitr); | |
398 | - egc_vram_src.b[1][ext] = (egc_outptr[4] << egc_sft8bitl) | (egc_outptr[5] >> egc_sft8bitr); | |
399 | - egc_vram_src.b[2][ext] = (egc_outptr[8] << egc_sft8bitl) | (egc_outptr[9] >> egc_sft8bitr); | |
412 | + egc_vram_src.b[0][ext] = (egc_outptr[ 0] << egc_sft8bitl) | (egc_outptr[ 1] >> egc_sft8bitr); | |
413 | + egc_vram_src.b[1][ext] = (egc_outptr[ 4] << egc_sft8bitl) | (egc_outptr[ 5] >> egc_sft8bitr); | |
414 | + egc_vram_src.b[2][ext] = (egc_outptr[ 8] << egc_sft8bitl) | (egc_outptr[ 9] >> egc_sft8bitr); | |
400 | 415 | egc_vram_src.b[3][ext] = (egc_outptr[12] << egc_sft8bitl) | (egc_outptr[13] >> egc_sft8bitr); |
401 | 416 | #endif |
402 | 417 | egc_outptr++; |
403 | 418 | } |
404 | 419 | |
420 | +// -------- 8------- 3--***** | |
421 | +// ----- ---8---- ---3--** | |
422 | +// 1st -> (data[0] >> (dst - src)) | (data[-1] << (8 - (src - dst)) | |
423 | +// 2nd -> (data[0] >> (dst - src)) | (data[-1] << (8 - (src - dst)) | |
424 | + | |
405 | 425 | void __FASTCALL DISPLAY::egc_sftb_dnl_sub(uint32_t ext) |
406 | 426 | { |
407 | 427 | if(egc_dstbit >= 8) { |
@@ -451,9 +471,9 @@ __DECL_VECTORIZED_LOOP | ||
451 | 471 | egc_vram_src.b[i][ext] = tmp2[i]; |
452 | 472 | } |
453 | 473 | #else |
454 | - egc_vram_src.b[0][ext] = (egc_outptr[1] >> egc_sft8bitl) | (egc_outptr[0] << egc_sft8bitr); | |
455 | - egc_vram_src.b[1][ext] = (egc_outptr[5] >> egc_sft8bitl) | (egc_outptr[4] << egc_sft8bitr); | |
456 | - egc_vram_src.b[2][ext] = (egc_outptr[9] >> egc_sft8bitl) | (egc_outptr[8] << egc_sft8bitr); | |
474 | + egc_vram_src.b[0][ext] = (egc_outptr[ 1] >> egc_sft8bitl) | (egc_outptr[ 0] << egc_sft8bitr); | |
475 | + egc_vram_src.b[1][ext] = (egc_outptr[ 5] >> egc_sft8bitl) | (egc_outptr[ 4] << egc_sft8bitr); | |
476 | + egc_vram_src.b[2][ext] = (egc_outptr[ 9] >> egc_sft8bitl) | (egc_outptr[ 8] << egc_sft8bitr); | |
457 | 477 | egc_vram_src.b[3][ext] = (egc_outptr[13] >> egc_sft8bitl) | (egc_outptr[12] << egc_sft8bitr); |
458 | 478 | #endif |
459 | 479 | // egc_outptr--; |
@@ -506,6 +526,32 @@ __DECL_VECTORIZED_LOOP | ||
506 | 526 | } \ |
507 | 527 | } |
508 | 528 | |
529 | +#define EGC_OPE_SHIFTW2(value) \ | |
530 | + do { \ | |
531 | + pair16_t __tmp; \ | |
532 | + uint8_t* __tmpp; \ | |
533 | + __tmp.b.l = value; \ | |
534 | + __tmp.b.h = value >> 8; \ | |
535 | + if(!(egc_sft & 0x1000)) { \ | |
536 | + __tmpp = &(egc_inptr[0]); \ | |
537 | + __DECL_VECTORIZED_LOOP \ | |
538 | + for(int __xxx = 0; __xxx < 14; __xxx += 4) { \ | |
539 | + __tmpp[__xxx + 0] = __tmp.b.l; \ | |
540 | + __tmpp[__xxx + 1] = __tmp.b.h; \ | |
541 | + } \ | |
542 | + egc_shiftinput_incw(); \ | |
543 | + } else { \ | |
544 | + __tmpp = &(egc_inptr[-1]); \ | |
545 | + __DECL_VECTORIZED_LOOP \ | |
546 | + for(int __xxx = 0; __xxx < 14; __xxx += 4) { \ | |
547 | + __tmpp[__xxx + 0] = __tmp.b.l; \ | |
548 | + __tmpp[__xxx + 1] = __tmp.b.h; \ | |
549 | + } \ | |
550 | + egc_shiftinput_decw(); \ | |
551 | + } \ | |
552 | + } while(0) | |
553 | + | |
554 | +// ---- | |
509 | 555 | #else |
510 | 556 | |
511 | 557 | #define EGC_OPE_SHIFTB(addr, value) \ |
@@ -547,6 +593,34 @@ __DECL_VECTORIZED_LOOP | ||
547 | 593 | } \ |
548 | 594 | } \ |
549 | 595 | } while(0) |
596 | + | |
597 | +#define EGC_OPE_SHIFTW2(value) \ | |
598 | + do { \ | |
599 | + if(!(egc_sft & 0x1000)) { \ | |
600 | + egc_inptr[ 0] = (uint8_t)value; \ | |
601 | + egc_inptr[ 1] = (uint8_t)(value >> 8); \ | |
602 | + egc_inptr[ 4] = (uint8_t)value; \ | |
603 | + egc_inptr[ 5] = (uint8_t)(value >> 8); \ | |
604 | + egc_inptr[ 8] = (uint8_t)value; \ | |
605 | + egc_inptr[ 9] = (uint8_t)(value >> 8); \ | |
606 | + egc_inptr[12] = (uint8_t)value; \ | |
607 | + egc_inptr[13] = (uint8_t)(value >> 8); \ | |
608 | + egc_shiftinput_incw(); \ | |
609 | + } else { \ | |
610 | + egc_inptr[-1] = (uint8_t)value; \ | |
611 | + egc_inptr[ 0] = (uint8_t)(value >> 8); \ | |
612 | + egc_inptr[ 3] = (uint8_t)value; \ | |
613 | + egc_inptr[ 4] = (uint8_t)(value >> 8); \ | |
614 | + egc_inptr[ 7] = (uint8_t)value; \ | |
615 | + egc_inptr[ 8] = (uint8_t)(value >> 8); \ | |
616 | + egc_inptr[11] = (uint8_t)value; \ | |
617 | + egc_inptr[12] = (uint8_t)(value >> 8); \ | |
618 | + egc_shiftinput_decw(); \ | |
619 | + } \ | |
620 | + } while(0) | |
621 | + | |
622 | +// ---- | |
623 | + | |
550 | 624 | #endif |
551 | 625 | |
552 | 626 | uint64_t __FASTCALL DISPLAY::egc_ope_xx(uint8_t ope, uint32_t addr) |
@@ -562,6 +636,10 @@ uint64_t __FASTCALL DISPLAY::egc_ope_xx(uint8_t ope, uint32_t addr) | ||
562 | 636 | case 0x4000: |
563 | 637 | pat.q = egc_fgc.q; |
564 | 638 | break; |
639 | + case 0x6000: | |
640 | + pat.d[0] = egc_fgc.d[0]; | |
641 | + pat.d[1] = egc_bgc.d[1]; | |
642 | + break; | |
565 | 643 | // default: |
566 | 644 | case 0x0000: |
567 | 645 | if((egc_ope & 0x0300) == 0x0100) { |
@@ -909,13 +987,10 @@ uint64_t __FASTCALL DISPLAY::egc_opeb(uint32_t addr, uint8_t value) | ||
909 | 987 | return egc_bgc.q; |
910 | 988 | case 0x4000: |
911 | 989 | return egc_fgc.q; |
912 | -// default: // 0x0000, 0x6000 | |
913 | - case 0x0000: | |
990 | + default: // 0x0000, 0x6000 | |
914 | 991 | EGC_OPE_SHIFTB(addr, value); |
915 | 992 | egc_mask2.w &= egc_srcmask.w; |
916 | 993 | return egc_vram_src.q; |
917 | - default: | |
918 | - return egc_vram_src.q; | |
919 | 994 | } |
920 | 995 | break; |
921 | 996 | default: |
@@ -942,18 +1017,15 @@ uint64_t __FASTCALL DISPLAY::egc_opew(uint32_t addr, uint16_t value) | ||
942 | 1017 | tmp = egc_ope & 0xff; |
943 | 1018 | return egc_opefn(tmp, (uint8_t)tmp, addr); |
944 | 1019 | case 0x1000: |
1020 | + EGC_OPE_SHIFTW2(value); | |
1021 | + egc_mask2.w &= egc_srcmask.w; | |
945 | 1022 | switch(egc_fgbg & 0x6000) { |
946 | 1023 | case 0x2000: |
947 | 1024 | return egc_bgc.q; |
948 | 1025 | case 0x4000: |
949 | 1026 | return egc_fgc.q; |
950 | -// default: | |
951 | - case 0x0000: | |
952 | - EGC_OPE_SHIFTW(value); | |
953 | - egc_mask2.w &= egc_srcmask.w; | |
954 | - return egc_vram_src.q; | |
955 | 1027 | default: |
956 | - return egc_vram_src.q; | |
1028 | + return egc_patreg.q; | |
957 | 1029 | } |
958 | 1030 | break; |
959 | 1031 | default: |
@@ -968,6 +1040,8 @@ uint64_t __FASTCALL DISPLAY::egc_opew(uint32_t addr, uint16_t value) | ||
968 | 1040 | } |
969 | 1041 | } |
970 | 1042 | |
1043 | +// ---- | |
1044 | + | |
971 | 1045 | uint32_t __FASTCALL DISPLAY::egc_readb(uint32_t addr1) |
972 | 1046 | { |
973 | 1047 | uint32_t addr = addr1 & VRAM_PLANE_ADDR_MASK; |
@@ -992,14 +1066,15 @@ __DECL_VECTORIZED_LOOP | ||
992 | 1066 | // egc_lastvram.b[2][ext] = vram_draw[addr | VRAM_PLANE_ADDR_2]; |
993 | 1067 | // egc_lastvram.b[3][ext] = vram_draw[addr | VRAM_PLANE_ADDR_3]; |
994 | 1068 | |
1069 | + // shift input | |
995 | 1070 | if(!(egc_ope & 0x400)) { |
996 | 1071 | __DECL_VECTORIZED_LOOP |
997 | 1072 | for(int i = 0; i < 4; i++) { |
998 | 1073 | egc_inptr[i << 2] = egc_lastvram.b[i][ext]; |
999 | 1074 | } |
1000 | -// egc_inptr[0] = egc_lastvram.b[0][ext]; | |
1001 | -// egc_inptr[4] = egc_lastvram.b[1][ext]; | |
1002 | -// egc_inptr[8] = egc_lastvram.b[2][ext]; | |
1075 | +// egc_inptr[ 0] = egc_lastvram.b[0][ext]; | |
1076 | +// egc_inptr[ 4] = egc_lastvram.b[1][ext]; | |
1077 | +// egc_inptr[ 8] = egc_lastvram.b[2][ext]; | |
1003 | 1078 | // egc_inptr[12] = egc_lastvram.b[3][ext]; |
1004 | 1079 | egc_shiftinput_byte(ext); |
1005 | 1080 | } |
@@ -1027,7 +1102,6 @@ __DECL_VECTORIZED_LOOP | ||
1027 | 1102 | |
1028 | 1103 | uint32_t __FASTCALL DISPLAY::egc_readw(uint32_t addr1) |
1029 | 1104 | { |
1030 | - uint32_t addr = addr1 & VRAM_PLANE_ADDR_MASK; | |
1031 | 1105 | static const uint32_t vram_base[4] = {VRAM_PLANE_ADDR_0, |
1032 | 1106 | VRAM_PLANE_ADDR_1, |
1033 | 1107 | VRAM_PLANE_ADDR_2, |
@@ -1035,11 +1109,12 @@ uint32_t __FASTCALL DISPLAY::egc_readw(uint32_t addr1) | ||
1035 | 1109 | if(!(enable_egc)) return 0; |
1036 | 1110 | __DECL_ALIGNED(16) uint32_t realaddr[4]; |
1037 | 1111 | |
1112 | + if(!(addr1 & 1)) { | |
1113 | + uint32_t addr = addr1 & VRAM_PLANE_ADDR_MASK; | |
1038 | 1114 | __DECL_VECTORIZED_LOOP |
1039 | - for(int i = 0; i < 4; i++) { | |
1040 | - realaddr[i] = addr | vram_base[i]; | |
1041 | - } | |
1042 | - if(!(addr & 1)) { | |
1115 | + for(int i = 0; i < 4; i++) { | |
1116 | + realaddr[i] = addr | vram_base[i]; | |
1117 | + } | |
1043 | 1118 | #ifdef __BIG_ENDIAN__ |
1044 | 1119 | egc_lastvram.w[0] = vram_draw_readw(addr | VRAM_PLANE_ADDR_0); |
1045 | 1120 | egc_lastvram.w[1] = vram_draw_readw(addr | VRAM_PLANE_ADDR_1); |
@@ -1056,23 +1131,23 @@ __DECL_VECTORIZED_LOOP | ||
1056 | 1131 | // egc_lastvram.w[2] = *(uint16_t *)(&vram_draw[addr | VRAM_PLANE_ADDR_2]); |
1057 | 1132 | // egc_lastvram.w[3] = *(uint16_t *)(&vram_draw[addr | VRAM_PLANE_ADDR_3]); |
1058 | 1133 | |
1134 | + // shift input | |
1135 | + int pl = (egc_fgbg >> 8) & 3; | |
1136 | + | |
1059 | 1137 | if(!(egc_ope & 0x400)) { |
1060 | 1138 | if(!(egc_sft & 0x1000)) { |
1061 | - uint8_t *pp = (uint8_t*)(&(egc_lastvram.b[0][0])); | |
1062 | - __DECL_VECTORIZED_LOOP | |
1063 | - for(int i = 0; i < 4; i++) { | |
1064 | - egc_inptr[(i << 2) + 0] = pp[(i << 1) + 0]; | |
1065 | - egc_inptr[(i << 2) + 1] = pp[(i << 1) + 1]; | |
1066 | - } | |
1067 | -// egc_inptr[ 0] = egc_lastvram.b[0][0]; | |
1068 | -// egc_inptr[ 1] = egc_lastvram.b[0][1]; | |
1069 | -// egc_inptr[ 4] = egc_lastvram.b[1][0]; | |
1070 | -// egc_inptr[ 5] = egc_lastvram.b[1][1]; | |
1071 | -// egc_inptr[ 8] = egc_lastvram.b[2][0]; | |
1072 | -// egc_inptr[ 9] = egc_lastvram.b[2][1]; | |
1073 | -// egc_inptr[12] = egc_lastvram.b[3][0]; | |
1074 | -// egc_inptr[13] = egc_lastvram.b[3][1]; | |
1075 | - egc_shiftinput_incw(); | |
1139 | + if(!(egc_ope & 0x2000)) { | |
1140 | + egc_inptr[4 * pl + 0] = egc_lastvram.b[pl][0]; | |
1141 | + egc_inptr[4 * pl + 1] = egc_lastvram.b[pl][1]; | |
1142 | + } else { | |
1143 | + uint8_t *pp = (uint8_t*)(&(egc_lastvram.b[0][0])); | |
1144 | + __DECL_VECTORIZED_LOOP | |
1145 | + for(int i = 0; i < 4; i++) { | |
1146 | + egc_inptr[(i << 2) + 0] = pp[(i << 1) + 0]; | |
1147 | + egc_inptr[(i << 2) + 1] = pp[(i << 1) + 1]; | |
1148 | + } | |
1149 | + egc_shiftinput_incw(); | |
1150 | + } | |
1076 | 1151 | } else { |
1077 | 1152 | uint8_t *pp = (uint8_t*)(&(egc_lastvram.b[0][0])); |
1078 | 1153 | __DECL_VECTORIZED_LOOP |
@@ -1096,22 +1171,44 @@ __DECL_VECTORIZED_LOOP | ||
1096 | 1171 | egc_patreg.d[1] = egc_lastvram.d[1]; |
1097 | 1172 | } |
1098 | 1173 | if(!(egc_ope & 0x2000)) { |
1099 | - int pl = (egc_fgbg >> 8) & 3; | |
1100 | - if(!(egc_ope & 0x400)) { | |
1101 | - return egc_vram_src.w[pl]; | |
1174 | + uint32_t temp_1 = 0, temp_2 = 0, temp_3 = 0, temp; | |
1175 | + if(addr > 3) temp_3 = vram_draw[(addr - 3) | (VRAM_PLANE_SIZE * pl)]; | |
1176 | + if(addr > 2) temp_2 = vram_draw[(addr - 2) | (VRAM_PLANE_SIZE * pl)]; | |
1177 | + if(addr > 1) temp_1 = vram_draw[(addr - 1) | (VRAM_PLANE_SIZE * pl)]; | |
1178 | + uint32_t temp0 = vram_draw[(addr + 0) | (VRAM_PLANE_SIZE * pl)]; | |
1179 | + uint32_t temp1 = vram_draw[(addr + 1) | (VRAM_PLANE_SIZE * pl)]; | |
1180 | + if(((egc_sft & 0xf0) >> 4) < (egc_sft & 0x0f)) { | |
1181 | + // sftcopy1? | |
1182 | + temp = (temp_3 << 24) | (temp_2 << 16) | (temp_1 << 8) | (temp0); | |
1183 | + temp = (temp << (egc_sft & 0x0f)) >> ((egc_sft & 0xf0) >> 4); | |
1184 | + temp = temp >> 8; | |
1185 | + return ((temp & 0xff00) >> 8) | ((temp & 0xff) << 8); | |
1102 | 1186 | } else { |
1103 | - #ifdef __BIG_ENDIAN__ | |
1104 | - return vram_draw_readw(addr | (VRAM_PLANE_SIZE * pl)); | |
1105 | - #else | |
1106 | - return *(uint16_t *)(&vram_draw[addr | (VRAM_PLANE_SIZE * pl)]); | |
1107 | - #endif | |
1187 | + // sftcopy | |
1188 | + temp = (temp_1 <<16) | (temp0 <<8) | temp1; | |
1189 | + temp = (temp << (egc_sft & 0x0f)) >> ((egc_sft & 0xf0) >> 4); | |
1190 | + return ((temp & 0xff00) >> 8) | ((temp & 0xff) << 8); | |
1108 | 1191 | } |
1109 | 1192 | } |
1193 | + uint16_t fg1 = 0, fg2 = 0, fg4 = 0, fg8 = 0; | |
1194 | + uint16_t temp3; | |
1195 | + if(!(egc_access & 1)) fg1 = (egc_fg&1)|(egc_fg&1)<<1|(egc_fg&1)<<2|(egc_fg&1)<<3|(egc_fg&1)<<4|(egc_fg&1)<<5|(egc_fg&1)<<6|(egc_fg&1)<<7; | |
1196 | + if(!(egc_access & 2)) fg2 = (egc_fg&2)|(egc_fg&2)<<1|(egc_fg&2)<<2|(egc_fg&2)<<3|(egc_fg&2)<<4|(egc_fg&2)<<5|(egc_fg&2)<<6|(egc_fg&2)<<7; | |
1197 | + if(!(egc_access & 4)) fg4 = (egc_fg&4)|(egc_fg&4)<<1|(egc_fg&4)<<2|(egc_fg&4)<<3|(egc_fg&4)<<4|(egc_fg&4)<<5|(egc_fg&4)<<6|(egc_fg&4)<<7; | |
1198 | + if(!(egc_access & 8)) fg8 = (egc_fg&8)|(egc_fg&8)<<1|(egc_fg&8)<<2|(egc_fg&8)<<3|(egc_fg&8)<<4|(egc_fg&8)<<5|(egc_fg&8)<<6|(egc_fg&8)<<7; | |
1110 | 1199 | #ifdef __BIG_ENDIAN__ |
1111 | - return vram_draw_readw(addr1); | |
1200 | + temp3 = vram_draw_readw(addr | VRAM_PLANE_ADDR_0) ^ fg1; | |
1201 | + temp3 |= vram_draw_readw(addr | VRAM_PLANE_ADDR_1) ^ fg2; | |
1202 | + temp3 |= vram_draw_readw(addr | VRAM_PLANE_ADDR_2) ^ fg4; | |
1203 | + temp3 |= vram_draw_readw(addr | VRAM_PLANE_ADDR_3) ^ fg8; | |
1112 | 1204 | #else |
1113 | - return *(uint16_t *)(&vram_draw[addr1]); | |
1205 | +// return *(uint16_t *)(&vram_draw[addr1]); | |
1206 | + temp3 = *(uint16_t *)(&vram_draw[addr | VRAM_PLANE_ADDR_0]) ^ fg1; | |
1207 | + temp3 |= *(uint16_t *)(&vram_draw[addr | VRAM_PLANE_ADDR_1]) ^ fg2; | |
1208 | + temp3 |= *(uint16_t *)(&vram_draw[addr | VRAM_PLANE_ADDR_2]) ^ fg4; | |
1209 | + temp3 |= *(uint16_t *)(&vram_draw[addr | VRAM_PLANE_ADDR_3]) ^ fg8; | |
1114 | 1210 | #endif |
1211 | + return (~temp3); | |
1115 | 1212 | } else if(!(egc_sft & 0x1000)) { |
1116 | 1213 | uint16_t value = egc_readb(addr1); |
1117 | 1214 | value |= egc_readb(addr1 + 1) << 8; |
@@ -1125,8 +1222,8 @@ __DECL_VECTORIZED_LOOP | ||
1125 | 1222 | |
1126 | 1223 | void __FASTCALL DISPLAY::egc_writeb(uint32_t addr1, uint8_t value) |
1127 | 1224 | { |
1128 | - uint32_t addr = addr1 & VRAM_PLANE_ADDR_MASK; | |
1129 | 1225 | uint32_t ext = addr1 & 1; |
1226 | + uint32_t addr = addr1 & VRAM_PLANE_ADDR_MASK; | |
1130 | 1227 | static const uint32_t vram_base[4] = {VRAM_PLANE_ADDR_0, |
1131 | 1228 | VRAM_PLANE_ADDR_1, |
1132 | 1229 | VRAM_PLANE_ADDR_2, |
@@ -1202,20 +1299,21 @@ __DECL_VECTORIZED_LOOP | ||
1202 | 1299 | |
1203 | 1300 | void __FASTCALL DISPLAY::egc_writew(uint32_t addr1, uint16_t value) |
1204 | 1301 | { |
1205 | - uint32_t addr = addr1 & VRAM_PLANE_ADDR_MASK; | |
1206 | 1302 | static const uint32_t vram_base[4] = {VRAM_PLANE_ADDR_0, |
1207 | 1303 | VRAM_PLANE_ADDR_1, |
1208 | 1304 | VRAM_PLANE_ADDR_2, |
1209 | 1305 | VRAM_PLANE_ADDR_3}; |
1210 | 1306 | __DECL_ALIGNED(16) uint32_t realaddr[4]; |
1211 | - __DECL_ALIGNED(16) egcquad_t data; | |
1212 | 1307 | if(!(enable_egc)) return; |
1213 | -__DECL_VECTORIZED_LOOP | |
1214 | - for(int i = 0; i < 4; i++) { | |
1215 | - realaddr[i] = addr | vram_base[i]; | |
1216 | - } | |
1217 | 1308 | |
1218 | - if(!(addr & 1)) { | |
1309 | + if(!(addr1 & 1)) { | |
1310 | + uint32_t addr = addr1 & VRAM_PLANE_ADDR_MASK; | |
1311 | + egcquad_t data; | |
1312 | + | |
1313 | +__DECL_VECTORIZED_LOOP | |
1314 | + for(int i = 0; i < 4; i++) { | |
1315 | + realaddr[i] = addr | vram_base[i]; | |
1316 | + } | |
1219 | 1317 | if((egc_ope & 0x0300) == 0x0200) { |
1220 | 1318 | #ifdef __BIG_ENDIAN__ |
1221 | 1319 | egc_patreg.w[0] = vram_draw_readw(addr | VRAM_PLANE_ADDR_0); |
@@ -23,11 +23,35 @@ void __FASTCALL DISPLAY::egc_shift() | ||
23 | 23 | src8 = egc_srcbit & 0x07; |
24 | 24 | dst8 = egc_dstbit & 0x07; |
25 | 25 | if(src8 < dst8) { |
26 | +// dir:inc | |
27 | +// ****---4 -------8 -------- | |
28 | +// ******-- -4------ --8----- -- | |
29 | +// 1st -> data[0] >> (dst - src) | |
30 | +// 2nd -> (data[0] << (8 - (dst - src))) | (data[1] >> (dst - src)) | |
31 | + | |
32 | +// dir:dec | |
33 | +// -------- 8------- 6-----** | |
34 | +// --- -----8-- -----6-- ---***** | |
35 | +// 1st -> data[0] << (dst - src) | |
36 | +// 2nd -> (data[0] >> (8 - (dst - src))) | (data[1] << (dst - src)) | |
37 | + | |
26 | 38 | egc_func += 2; |
27 | 39 | egc_sft8bitr = dst8 - src8; |
28 | 40 | egc_sft8bitl = 8 - egc_sft8bitr; |
29 | - } | |
30 | - else if(src8 > dst8) { | |
41 | + } else if(src8 > dst8) { | |
42 | + | |
43 | +// dir:inc | |
44 | +// ****---4 -------8 -------- | |
45 | +// **---4-- -----8-- ------ | |
46 | +// 1st -> (data[0] << (src - dst)) | (data[1] >> (8 - (src - dst)) | |
47 | +// 2nd -> (data[0] << (src - dst)) | (data[1] >> (8 - (src - dst)) | |
48 | + | |
49 | +// dir:dec | |
50 | +// -------- 8------- 3--***** | |
51 | +// ----- ---8---- ---3--** | |
52 | +// 1st -> (data[0] >> (dst - src)) | (data[-1] << (8 - (src - dst)) | |
53 | +// 2nd -> (data[0] >> (dst - src)) | (data[-1] << (8 - (src - dst)) | |
54 | + | |
31 | 55 | egc_func += 4; |
32 | 56 | egc_sft8bitl = src8 - dst8; |
33 | 57 | egc_sft8bitr = 8 - egc_sft8bitl; |
@@ -100,6 +124,7 @@ void __FASTCALL DISPLAY::egc_sftw_dnn0() | ||
100 | 124 | egc_shift(); |
101 | 125 | } |
102 | 126 | |
127 | +// dir:up srcbit < dstbit | |
103 | 128 | void __FASTCALL DISPLAY::egc_sftb_upr0(uint32_t ext) |
104 | 129 | { |
105 | 130 | if(egc_stack < (uint32_t)(8 - egc_dstbit)) { |
@@ -113,6 +138,7 @@ void __FASTCALL DISPLAY::egc_sftb_upr0(uint32_t ext) | ||
113 | 138 | } |
114 | 139 | } |
115 | 140 | |
141 | +// dir:up srcbit < dstbit | |
116 | 142 | void __FASTCALL DISPLAY::egc_sftw_upr0() |
117 | 143 | { |
118 | 144 | if(egc_stack < (uint32_t)(16 - egc_dstbit)) { |
@@ -132,6 +158,7 @@ void __FASTCALL DISPLAY::egc_sftw_upr0() | ||
132 | 158 | egc_shift(); |
133 | 159 | } |
134 | 160 | |
161 | +// dir:up srcbit < dstbit | |
135 | 162 | void __FASTCALL DISPLAY::egc_sftb_dnr0(uint32_t ext) |
136 | 163 | { |
137 | 164 | if(egc_stack < (uint32_t)(8 - egc_dstbit)) { |
@@ -145,6 +172,7 @@ void __FASTCALL DISPLAY::egc_sftb_dnr0(uint32_t ext) | ||
145 | 172 | } |
146 | 173 | } |
147 | 174 | |
175 | +// dir:up srcbit < dstbit | |
148 | 176 | void __FASTCALL DISPLAY::egc_sftw_dnr0() |
149 | 177 | { |
150 | 178 | if(egc_stack < (uint32_t)(16 - egc_dstbit)) { |
@@ -164,6 +192,7 @@ void __FASTCALL DISPLAY::egc_sftw_dnr0() | ||
164 | 192 | egc_shift(); |
165 | 193 | } |
166 | 194 | |
195 | +// dir:up srcbit > dstbit | |
167 | 196 | void __FASTCALL DISPLAY::egc_sftb_upl0(uint32_t ext) |
168 | 197 | { |
169 | 198 | if(egc_stack < (uint32_t)(8 - egc_dstbit)) { |
@@ -177,6 +206,7 @@ void __FASTCALL DISPLAY::egc_sftb_upl0(uint32_t ext) | ||
177 | 206 | } |
178 | 207 | } |
179 | 208 | |
209 | +// dir:up srcbit > dstbit | |
180 | 210 | void __FASTCALL DISPLAY::egc_sftw_upl0() |
181 | 211 | { |
182 | 212 | if(egc_stack < (uint32_t)(16 - egc_dstbit)) { |
@@ -196,6 +226,7 @@ void __FASTCALL DISPLAY::egc_sftw_upl0() | ||
196 | 226 | egc_shift(); |
197 | 227 | } |
198 | 228 | |
229 | +// dir:up srcbit > dstbit | |
199 | 230 | void __FASTCALL DISPLAY::egc_sftb_dnl0(uint32_t ext) |
200 | 231 | { |
201 | 232 | if(egc_stack < (uint32_t)(8 - egc_dstbit)) { |
@@ -209,6 +240,7 @@ void __FASTCALL DISPLAY::egc_sftb_dnl0(uint32_t ext) | ||
209 | 240 | } |
210 | 241 | } |
211 | 242 | |
243 | +// dir:up srcbit > dstbit | |
212 | 244 | void __FASTCALL DISPLAY::egc_sftw_dnl0() |
213 | 245 | { |
214 | 246 | if(egc_stack < (uint32_t)(16 - egc_dstbit)) { |
@@ -387,6 +419,10 @@ uint64_t __FASTCALL DISPLAY::egc_ope_nd(uint8_t ope, uint32_t addr) | ||
387 | 419 | // pat.d[0] = egc_fgc.d[0]; |
388 | 420 | // pat.d[1] = egc_fgc.d[1]; |
389 | 421 | break; |
422 | + case 0x6000: | |
423 | + pat.d[0] = egc_fgc.d[0]; | |
424 | + pat.d[1] = egc_bgc.d[1]; | |
425 | + break; | |
390 | 426 | // default: |
391 | 427 | case 0x0000: |
392 | 428 | if((egc_ope & 0x0300) == 0x0100) { |
@@ -1915,8 +1915,9 @@ void PCE::cdrom_write(uint16_t addr, uint8_t data) | ||
1915 | 1915 | // From Ootake v2.38 |
1916 | 1916 | d_adpcm->write_signal(SIG_ADPCM_DMA_ENABLED, 0x00000000, 0xffffffff); |
1917 | 1917 | //adpcm_dma_enabled = false; |
1918 | - cdrom_regs[0x03] = 0x00; // Reset IRQ status at al. | |
1919 | - set_cdrom_irq_line(0x0, 0x0); // Update IRQ | |
1918 | +// cdrom_regs[0x03] = 0x00; // Reset IRQ status at al. | |
1919 | +// set_cdrom_irq_line(0x0, 0x0); // Update IRQ | |
1920 | + set_cdrom_irq_line(0x70, CLEAR_LINE); | |
1920 | 1921 | out_debug_log(_T("CMD=$00 CDC STATUS\n")); |
1921 | 1922 | break; |
1922 | 1923 |