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common_source_project-fm7: Commit

Common Source Code Project for Qt (a.k.a for FM-7).


Commit MetaInfo

Revision223d7b688342ebf4bbba3dfd1f73f3fed53e4da7 (tree)
Zeit2022-11-29 00:29:54
AutorK.Ohta <whatisthis.sowhat@gmai...>
CommiterK.Ohta

Log Message

[UPSTREAM/TAKEDA] 2022-11-20 .

Ändern Zusammenfassung

Diff

--- a/source/history.txt
+++ b/source/history.txt
@@ -1,3 +1,8 @@
1+11/20/2022
2+
3+[VM/I8251] fix to make tx ready in reset
4+
5+
16 11/17/2022
27
38 [PC9801/CPUREG] fix A20 mask for 32bit cpu
--- a/source/src/vm/i8251.cpp
+++ b/source/src/vm/i8251.cpp
@@ -60,7 +60,8 @@ void I8251::reset()
6060 // dont reset dsr
6161 status &= DSR;
6262 status |= TXRDY | TXE;
63- txen = rxen = loopback = false;
63+ txen = true;
64+ rxen = loopback = false;
6465
6566 recv_buffer->clear();
6667 send_buffer->clear();
--- a/source/src/vm/pc9801/cpureg.cpp
+++ b/source/src/vm/pc9801/cpureg.cpp
@@ -42,12 +42,12 @@ void CPUREG::write_io8(uint32_t addr, uint32_t data)
4242 case 0x00f0:
4343 d_cpu->reset();
4444 d_cpu->set_address_mask(0x000fffff);
45-#if !defined(SUPPORT_HIRESO)
45+#if defined(HAS_SUB_V30)
4646 d_cpu->write_signal(SIG_CPU_BUSREQ, data, 1);
4747 d_v30->reset();
4848 d_v30->write_signal(SIG_CPU_BUSREQ, ~data, 1);
4949 cpu_mode = ((data & 1) != 0);
50- d_pio->write_signal(SIG_I8255_PORT_B, data, 2);
50+ d_pio->write_signal(SIG_I8255_PORT_B, data << 1, 2);
5151 #endif
5252 break;
5353 case 0x00f2:
@@ -94,10 +94,7 @@ uint32_t CPUREG::read_io8(uint32_t addr)
9494 // value |= 0x10; // Unknown
9595 value |= 0x08; // RAM access, 1 = Internal-standard/External-enhanced RAM, 0 = Internal-enhanced RAM
9696 // value |= 0x04; // Refresh mode, 1 = Standard, 0 = High speed
97-#if defined(HAS_I86) || defined(HAS_V30)
98- value |= 0x02; // CPU mode, 1 = V30, 0 = 80286/80386
99-#endif
100-#if !defined(SUPPORT_HIRESO)
97+#if defined(HAS_SUB_V30)
10198 if(cpu_mode) {
10299 value |= 0x02; // CPU mode, 1 = V30, 0 = 80286/80386
103100 }
--- a/source/src/vm/pc9801/pc9801.cpp
+++ b/source/src/vm/pc9801/pc9801.cpp
@@ -43,7 +43,7 @@
4343 #else
4444 #include "../i86.h"
4545 #endif
46-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
46+#if defined(HAS_SUB_V30)
4747 #include "../i86.h" // V30
4848 #endif
4949 #include "../io.h"
@@ -207,7 +207,7 @@ VM::VM(EMU* parent_emu) : VM_TEMPLATE(parent_emu)
207207 cpu = new I386(this, emu);
208208 cpu->device_model = INTEL_I486DX;
209209 #endif
210-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
210+#if defined(HAS_SUB_V30)
211211 v30 = new I86(this, emu);
212212 v30->device_model = NEC_V30;
213213 #endif
@@ -375,7 +375,7 @@ VM::VM(EMU* parent_emu) : VM_TEMPLATE(parent_emu)
375375
376376 // set cpu device contexts
377377 event->set_context_cpu(cpu, cpu_clocks);
378-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
378+#if defined(HAS_SUB_V30)
379379 event->set_context_cpu(v30, v30_clocks);
380380 #endif
381381 #if defined(SUPPORT_320KB_FDD_IF)
@@ -504,7 +504,7 @@ VM::VM(EMU* parent_emu) : VM_TEMPLATE(parent_emu)
504504
505505 #if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)
506506 cpureg->set_context_cpu(cpu);
507-#if !defined(SUPPORT_HIRESO)
507+#if defined(HAS_SUB_V30)
508508 cpureg->set_context_v30(v30);
509509 cpureg->set_context_pio(pio_prn);
510510 cpureg->cpu_mode = (config.cpu_type == 2 || config.cpu_type == 3);
@@ -609,7 +609,7 @@ VM::VM(EMU* parent_emu) : VM_TEMPLATE(parent_emu)
609609 #ifdef USE_DEBUGGER
610610 cpu->set_context_debugger(new DEBUGGER(this, emu));
611611 #endif
612-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
612+#if defined(HAS_SUB_V30)
613613 v30->set_context_mem(memory);
614614 v30->set_context_io(io);
615615 v30->set_context_intr(pic);
@@ -1084,7 +1084,7 @@ VM::VM(EMU* parent_emu) : VM_TEMPLATE(parent_emu)
10841084 for(DEVICE* device = first_device; device; device = device->next_device) {
10851085 device->initialize();
10861086 }
1087-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
1087+#if defined(HAS_SUB_V30)
10881088 if(config.cpu_type == 2 || config.cpu_type == 3) {
10891089 cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
10901090 } else {
@@ -1201,10 +1201,7 @@ void VM::reset()
12011201 #if defined(SUPPORT_HIRESO)
12021202 // port_c |= 0x08; // MODSW, 1 = Normal Mode, 0 = Hireso Mode
12031203 #endif
1204-#if defined(HAS_V30) || defined(HAS_V33)
1205- port_c |= 0x04; // DIP SW 3-8, 1 = V30, 0 = 80x86
1206-#endif
1207-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
1204+#if defined(HAS_SUB_V30)
12081205 if(config.cpu_type == 2 || config.cpu_type == 3) {
12091206 port_c |= 0x04; // DIP SW 3-8, 1 = V30, 0 = 80x86
12101207 }
@@ -1277,13 +1274,14 @@ void VM::reset()
12771274 port_b |= 0x08; // DIP SW 1-8, 1 = Standard graphic mode, 0 = Enhanced graphic mode
12781275 #endif
12791276 port_b |= 0x04; // Printer BUSY#, 1 = Inactive, 0 = Active (BUSY)
1280-#if defined(HAS_V30) || defined(HAS_V33)
1281- port_b |= 0x02; // CPUT, 1 = V30/V33, 0 = 80x86
1282-#endif
1283-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
1277+#if !defined(SUPPORT_HIRESO)
1278+#if defined(HAS_SUB_V30)
12841279 if(cpureg->cpu_mode) {
12851280 port_b |= 0x02; // CPUT, 1 = V30/V33, 0 = 80x86
12861281 }
1282+#elif defined(HAS_V30) || defined(HAS_V33)
1283+ port_b |= 0x02; // CPUT, 1 = V30/V33, 0 = 80x86
1284+#endif
12871285 #endif
12881286 #if defined(_PC9801VF) || defined(_PC9801U)
12891287 port_b |= 0x01; // VF, 1 = PC-9801VF/U
@@ -1364,10 +1362,18 @@ DEVICE *VM::get_cpu(int index)
13641362 }
13651363 #else
13661364 if(index == 0) {
1365+#if defined(HAS_SUB_V30)
1366+ if(cpureg->cpu_mode) {
1367+ return NULL;
1368+ }
1369+#endif
13671370 return cpu;
13681371 } else if(index == 1) {
1369-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
1370- return v30;
1372+#if defined(HAS_SUB_V30)
1373+ if(cpureg->cpu_mode) {
1374+ return v30;
1375+ }
1376+ return NULL;
13711377 #elif defined(SUPPORT_320KB_FDD_IF)
13721378 return cpu_sub;
13731379 #endif
--- a/source/src/vm/pc9801/pc9801.h
+++ b/source/src/vm/pc9801/pc9801.h
@@ -106,6 +106,7 @@
106106 // #define PIT_CLOCK_8MHZ
107107 #if defined(_PC9801VX)
108108 #define USE_CPU_TYPE 4
109+ #define HAS_SUB_V30
109110 #else
110111 #define USE_CPU_TYPE 2
111112 #endif
@@ -130,6 +131,7 @@
130131 // #define PIT_CLOCK_8MHZ
131132 #if defined(_PC9801RA)
132133 #define USE_CPU_TYPE 4
134+ #define HAS_SUB_V30
133135 #else
134136 #define USE_CPU_TYPE 2
135137 #endif
@@ -397,7 +399,7 @@ class I286;
397399 #else
398400 class I86;
399401 #endif
400-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
402+#if defined(HAS_SUB_V30)
401403 class I86; // V30
402404 #endif
403405 class IO;
@@ -498,7 +500,7 @@ protected:
498500 #else
499501 I86* cpu;
500502 #endif
501-#if (defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS)) && !defined(SUPPORT_HIRESO)
503+#if defined(HAS_SUB_V30)
502504 I86* v30;
503505 #endif
504506 IO* io;
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