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chibios: Commit


Commit MetaInfo

Revision13092 (tree)
Zeit2019-10-07 16:45:49
Autorgdisirio

Log Message

Reworked DAC driver, missing DMAMUX RCC macros for G4.

Ändern Zusammenfassung

Diff

--- trunk/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c (revision 13091)
+++ trunk/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c (revision 13092)
@@ -283,6 +283,7 @@
283283
284284 if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) {
285285 /* DMA errors handling.*/
286+ dac_lld_stop_conversion(dacp);
286287 _dac_isr_error_code(dacp, DAC_ERR_DMAFAILURE);
287288 }
288289 else {
@@ -431,9 +432,15 @@
431432 /* Enabling DAC in SW triggering mode initially, initializing data to
432433 zero.*/
433434 #if STM32_DAC_DUAL_MODE == FALSE
434- dacp->params->dac->CR &= dacp->params->regmask;
435- dacp->params->dac->CR |= (DAC_CR_EN1 | dacp->config->cr) << dacp->params->regshift;
436- dac_lld_put_channel(dacp, channel, dacp->config->init);
435+ {
436+ uint32_t cr = dacp->params->dac->CR;
437+
438+ dacp->params->dac->CR = cr;
439+ cr &= dacp->params->regmask;
440+ cr |= (DAC_CR_EN1 | dacp->config->cr) << dacp->params->regshift;
441+ dacp->params->dac->CR &= dacp->params->regmask;
442+ dac_lld_put_channel(dacp, channel, dacp->config->init);
443+ }
437444 #else
438445 if ((dacp->config->datamode == DAC_DHRM_12BIT_RIGHT_DUAL) ||
439446 (dacp->config->datamode == DAC_DHRM_12BIT_LEFT_DUAL) ||
@@ -645,7 +652,7 @@
645652 dmaStreamSetPeripheral(dacp->dma, &dacp->params->dac->DHR12R1 +
646653 dacp->params->dataoffset);
647654 dmamode = dacp->params->dmamode |
648- STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
655+ STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_HWORD;
649656 break;
650657 case DAC_DHRM_12BIT_LEFT:
651658 osalDbgAssert(dacp->grpp->num_channels == 1, "invalid number of channels");
@@ -653,7 +660,7 @@
653660 dmaStreamSetPeripheral(dacp->dma, &dacp->params->dac->DHR12L1 +
654661 dacp->params->dataoffset);
655662 dmamode = dacp->params->dmamode |
656- STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
663+ STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_HWORD;
657664 break;
658665 case DAC_DHRM_8BIT_RIGHT:
659666 osalDbgAssert(dacp->grpp->num_channels == 1, "invalid number of channels");
@@ -661,7 +668,7 @@
661668 dmaStreamSetPeripheral(dacp->dma, &dacp->params->dac->DHR8R1 +
662669 dacp->params->dataoffset);
663670 dmamode = dacp->params->dmamode |
664- STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
671+ STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_BYTE;
665672
666673 /* In this mode the size of the buffer is halved because two samples
667674 packed in a single dacsample_t element.*/
@@ -689,7 +696,7 @@
689696
690697 dmaStreamSetPeripheral(dacp->dma, &dacp->params->dac->DHR8RD);
691698 dmamode = dacp->params->dmamode |
692- STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
699+ STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_HWORD;
693700 n /= 2;
694701 break;
695702 #endif
@@ -706,16 +713,17 @@
706713 dmaStreamEnable(dacp->dma);
707714
708715 /* DAC configuration.*/
716+ cr = dacp->params->dac->CR;
717+
709718 #if STM32_DAC_DUAL_MODE == FALSE
710- cr = DAC_CR_DMAEN1 | (dacp->grpp->trigger << DAC_CR_TSEL1_Pos) | DAC_CR_TEN1 | DAC_CR_EN1 | dacp->config->cr;
711- dacp->params->dac->CR &= dacp->params->regmask;
712- dacp->params->dac->CR |= cr << dacp->params->regshift;
719+ cr &= dacp->params->regmask;
720+ cr |= (DAC_CR_DMAEN1 | (dacp->grpp->trigger << DAC_CR_TSEL1_Pos) | DAC_CR_TEN1 | DAC_CR_EN1 | dacp->config->cr) << dacp->params->regshift;
713721 #else
714- dacp->params->dac->CR = 0;
715722 cr = DAC_CR_DMAEN1 | (dacp->grpp->trigger << DAC_CR_TSEL1_Pos) | DAC_CR_TEN1 | DAC_CR_EN1 | dacp->config->cr
716723 | (dacp->grpp->trigger << DAC_CR_TSEL2_Pos) | DAC_CR_TEN2 | DAC_CR_EN2 | (dacp->config->cr << 16);
724+#endif
725+
717726 dacp->params->dac->CR = cr;
718-#endif
719727 }
720728
721729 /**
@@ -729,6 +737,7 @@
729737 * @iclass
730738 */
731739 void dac_lld_stop_conversion(DACDriver *dacp) {
740+ uint32_t cr;
732741
733742 /* DMA channel disabled and released.*/
734743 dmaStreamDisable(dacp->dma);
@@ -735,20 +744,24 @@
735744 dmaStreamFreeI(dacp->dma);
736745 dacp->dma = NULL;
737746
747+ cr = dacp->params->dac->CR;
748+
738749 #if STM32_DAC_DUAL_MODE == FALSE
739- dacp->params->dac->CR &= dacp->params->regmask;
740- dacp->params->dac->CR |= (DAC_CR_EN1 | dacp->config->cr) << dacp->params->regshift;
750+ cr &= dacp->params->regmask;
751+ cr |= (DAC_CR_EN1 | dacp->config->cr) << dacp->params->regshift;
741752 #else
742753 if ((dacp->config->datamode == DAC_DHRM_12BIT_RIGHT_DUAL) ||
743754 (dacp->config->datamode == DAC_DHRM_12BIT_LEFT_DUAL) ||
744755 (dacp->config->datamode == DAC_DHRM_8BIT_RIGHT_DUAL)) {
745- dacp->params->dac->CR = DAC_CR_EN2 | (dacp->config->cr << 16) |
746- DAC_CR_EN1 | dacp->config->cr;
756+ cr = DAC_CR_EN2 | (dacp->config->cr << 16) |
757+ DAC_CR_EN1 | dacp->config->cr;
747758 }
748759 else {
749- dacp->params->dac->CR = DAC_CR_EN1 | dacp->config->cr;
760+ cr = DAC_CR_EN1 | dacp->config->cr;
750761 }
751762 #endif
763+
764+ dacp->params->dac->CR = cr;
752765 }
753766
754767 #endif /* HAL_USE_DAC */
--- trunk/os/hal/ports/STM32/STM32G4xx/stm32_rcc.h (revision 13091)
+++ trunk/os/hal/ports/STM32/STM32G4xx/stm32_rcc.h (revision 13092)
@@ -509,6 +509,34 @@
509509 /** @} */
510510
511511 /**
512+ * @name DMAMUX peripheral specific RCC operations
513+ * @{
514+ */
515+/**
516+ * @brief Enables the DMAMUX peripheral clock.
517+ *
518+ * @param[in] lp low power enable flag
519+ *
520+ * @api
521+ */
522+#define rccEnableDMAMUX(lp) rccEnableAHB1(RCC_AHB1ENR_DMAMUX1EN, lp)
523+
524+/**
525+ * @brief Disables the DMAMUX peripheral clock.
526+ *
527+ * @api
528+ */
529+#define rccDisableDMAMUX() rccDisableAHB1(RCC_AHB1ENR_DMAMUX1EN)
530+
531+/**
532+ * @brief Resets the DMAMUX peripheral.
533+ *
534+ * @api
535+ */
536+#define rccResetDMAMUX() rccResetAHB1(RCC_AHB1RSTR_DMAMUX1RST)
537+/** @} */
538+
539+/**
512540 * @name PWR interface specific RCC operations
513541 * @{
514542 */
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